From ce9e21a0ea78039d80838071f9514c6a2ddaa8bc Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Sun, 5 Jun 2016 18:48:31 -0700 Subject: soc/intel/quark: Add C bootblock Add a bootblock which builds with C_ENVIRONMENT_BOOTBLOCK selected. This is the first piece in supporting FSP 2.0. Move esraminit from romstage into the bootblock. Replace cache_as_ram with car_stage_entry.S and code in romstage.c TEST=Build and run on Galileo Gen2 Change-Id: I14d2af2adb6e75d4bff1ebfb863196df04d07daf Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/15132 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/quark/Makefile.inc | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/quark/Makefile.inc') diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index d7470797fa..edbb8be5b7 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -18,6 +18,13 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y) subdirs-y += romstage subdirs-y += ../../../cpu/x86/tsc +bootblock-y += bootblock/esram_init.S +bootblock-y += bootblock/bootblock.c +bootblock-y += i2c.c +bootblock-y += reg_access.c +bootblock-y += tsc_freq.c +bootblock-y += uart_common.c + romstage-y += i2c.c romstage-y += memmap.c romstage-y += reg_access.c -- cgit v1.2.3