From a6de5470fa757f7e9c40d417e7f40551ccdba99c Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Sun, 21 Feb 2016 16:04:53 -0800 Subject: soc/intel/quark: Initialize some of the FADT base registers Initialize the base addresses for: * Power management control * Power management status * Reset * Power management timer * General-Purpose Event 0 Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file: * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate UEFIPAYLOAD.fd * Edit .config file and add the following lines: * CONFIG_PAYLOAD_ELF=y * CONFIG_PAYLOAD_FILE="path to UEFIPAYLOAD.fd" * Testing successful when: * Register address are properly displayed by the payload * "reset -c" performs a reset and reboots the system * "reset -w" performs a reset and reboots the system * "reset -s" performs a reset and turns off the power Change-Id: I9d043f4906a067b2477650140210cfae4a7f8b79 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/13764 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/quark/include/soc/iomap.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/soc/intel/quark/include') diff --git a/src/soc/intel/quark/include/soc/iomap.h b/src/soc/intel/quark/include/soc/iomap.h index f033dcb560..31cf604844 100644 --- a/src/soc/intel/quark/include/soc/iomap.h +++ b/src/soc/intel/quark/include/soc/iomap.h @@ -24,4 +24,10 @@ /* UART MMIO */ #define UART_BASE_ADDRESS CONFIG_TTYS0_BASE +/* + * I/O port address space + */ +#define ACPI_BASE_ADDRESS 0x1000 +#define ACPI_BASE_SIZE 0x100 + #endif /* _QUARK_IOMAP_H_ */ -- cgit v1.2.3