From 6e2d0c1b90251b4b61af582d2598cdbd38591db7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 28 Jun 2019 10:08:51 +0300 Subject: arch/x86: Adjust size of postcar stack MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With VBOOT=y && VBOOT_MEASURED_BOOT=y message digest will be allocated from the stack and 1 KiB reserve used with the recent platforms was no longer sufficient. The comment of LZMA scratchpad consuming stack was obsolete for postcar, so these can be reduced to same 4 KiB. Change-Id: Iba1fb5bfad6946f316feac2d8c998a782142a56a Signed-off-by: Mario Scheithauer Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/33775 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Werner Zeh --- src/soc/intel/quark/romstage/fsp2_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/quark/romstage/fsp2_0.c') diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index 5ebbacbd2a..a8bd26eceb 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -61,7 +62,7 @@ asmlinkage void car_stage_c_entry(void) /* Initialize the PCIe bridges */ pcie_init(); - if (postcar_frame_init(&pcf, 1*KiB)) + if (postcar_frame_init(&pcf, 0)) die("Unable to initialize postcar frame.\n"); /* Locate the top of RAM */ -- cgit v1.2.3