From 2ed7eb795cbcef16e7647d2ccb6052e7057456b5 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Fri, 1 Jan 2016 18:08:48 -0800 Subject: soc/intel/quark: Add minimal Quark SoC X1000 files Add the files for minimal Quark X1000 SoC support: * Declare pei_data structure * Declare sleep states and chipset_power_state structure * Specify top of memory * Empty FspUpdVpd.h file TEST=None Change-Id: If741f84904394780e1f29bd6ddbd81514c3e21c9 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/13439 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/quark/Kconfig | 31 ++++++++++++++ src/soc/intel/quark/Makefile.inc | 29 +++++++++++++ src/soc/intel/quark/include/soc/pei_wrapper.h | 60 +++++++++++++++++++++++++++ src/soc/intel/quark/include/soc/pm.h | 33 +++++++++++++++ src/soc/intel/quark/memmap.c | 22 ++++++++++ 5 files changed, 175 insertions(+) create mode 100644 src/soc/intel/quark/Kconfig create mode 100644 src/soc/intel/quark/Makefile.inc create mode 100644 src/soc/intel/quark/include/soc/pei_wrapper.h create mode 100644 src/soc/intel/quark/include/soc/pm.h create mode 100644 src/soc/intel/quark/memmap.c (limited to 'src/soc/intel/quark') diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig new file mode 100644 index 0000000000..866b66d011 --- /dev/null +++ b/src/soc/intel/quark/Kconfig @@ -0,0 +1,31 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2015-2016 Intel Corp. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +config SOC_INTEL_QUARK + bool + help + Intel Quark support + +if SOC_INTEL_QUARK + +config CPU_SPECIFIC_OPTIONS + def_bool y + select ARCH_BOOTBLOCK_X86_32 + select ARCH_RAMSTAGE_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_VERSTAGE_X86_32 + select USE_MARCH_586 + +endif # SOC_INTEL_QUARK diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc new file mode 100644 index 0000000000..6327ae6548 --- /dev/null +++ b/src/soc/intel/quark/Makefile.inc @@ -0,0 +1,29 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015-2016 Intel Corporation. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ifeq ($(CONFIG_SOC_INTEL_QUARK),y) + +subdirs-y += ../../../cpu/x86/tsc + +romstage-y += memmap.c + +ramstage-y += memmap.c + +CPPFLAGS_common += -I$(src)/soc/intel/quark/include + +# Chipset microcode path +CPPFLAGS_common += -I3rdparty/blobs/soc/intel/quark + +endif # CONFIG_SOC_INTEL_QUARK diff --git a/src/soc/intel/quark/include/soc/pei_wrapper.h b/src/soc/intel/quark/include/soc/pei_wrapper.h new file mode 100644 index 0000000000..5328e76e06 --- /dev/null +++ b/src/soc/intel/quark/include/soc/pei_wrapper.h @@ -0,0 +1,60 @@ +/* + * UEFI PEI wrapper + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015-2016 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Google Inc. nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL GOOGLE INC BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _PEI_WRAPPER_H_ +#define _PEI_WRAPPER_H_ + +#include + +#define PEI_VERSION 22 + +#define ABI_X86 __attribute__((regparm(0))) + +typedef void ABI_X86(*tx_byte_func)(unsigned char byte); + +struct pei_data { + uint32_t pei_version; + + int boot_mode; + + /* Data read from flash and passed into MRC */ + const void *saved_data; + int saved_data_size; + + /* Disable use of saved data (can be set by mainboard) */ + int disable_saved_data; + + /* Data from MRC that should be saved to flash */ + void *data_to_save; + int data_to_save_size; +} __attribute__((packed)); + +typedef struct pei_data PEI_DATA; + +#endif /* _PEI_WRAPPER_H_ */ diff --git a/src/soc/intel/quark/include/soc/pm.h b/src/soc/intel/quark/include/soc/pm.h new file mode 100644 index 0000000000..f9ae027c48 --- /dev/null +++ b/src/soc/intel/quark/include/soc/pm.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015-2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_PM_H_ +#define _SOC_PM_H_ + +#include + +/* Generic sleep state types */ +#define SLEEP_STATE_S0 0 +#define SLEEP_STATE_S3 3 +#define SLEEP_STATE_S5 5 + +struct chipset_power_state { + uint32_t prev_sleep_state; +} __attribute__ ((packed)); + +struct chipset_power_state *fill_power_state(void); + +#endif diff --git a/src/soc/intel/quark/memmap.c b/src/soc/intel/quark/memmap.c new file mode 100644 index 0000000000..2edfdc40e8 --- /dev/null +++ b/src/soc/intel/quark/memmap.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015-2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +void *cbmem_top(void) +{ + /* TODO: Get this dynamically*/ + return (void *)0x0afd0000; +} -- cgit v1.2.3