From 5196642870df642102699613642d412561f6609d Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Thu, 11 May 2017 20:31:06 +0530 Subject: soc/intel/skylake: Use Intel PCIe common code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ia9fa22c30fffb1907320667ac37f55db9f3cb7b3 Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/19666 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Philippe Mathieu-Daudé --- src/soc/intel/skylake/Makefile.inc | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/intel/skylake/Makefile.inc') diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 6f1d1d5112..21f2f74811 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -66,7 +66,6 @@ ramstage-y += memmap.c ramstage-y += monotonic_timer.c ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += opregion.c ramstage-y += pch.c -ramstage-y += pcie.c ramstage-y += pei_data.c ramstage-y += pmc.c ramstage-y += pmutil.c -- cgit v1.2.3