From 86d937fb46bfb3b4d5c850b28e79ff25cb56faa4 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 27 Aug 2015 16:01:08 -0700 Subject: skylake: ACPI: Clean up pch.asl Clean up the code in pch.asl: - move all the C header includes into here instead of duplicated in various ASL files included from here - move the trap field definition into platform.asl with the method - alphebetize the includes - move gpio.asl include into pch.asl - remove duplicate irqlinks.asl include from lpc.asl BUG=chrome-os-partner:44622 BRANCH=none TEST=emerge-glados coreboot Change-Id: I51b1c5286fc344df6942a24c1dea71abf10ab561 Signed-off-by: Patrick Georgi Original-Commit-Id: 3ee9c4afa031191d275f0d3d40b2b15b85369b2f Original-Change-Id: I3bae434ad227273885d8436db23e17e593739f77 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/295903 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11530 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/acpi/pch.asl | 40 +++++++++++++++++--------------------- 1 file changed, 18 insertions(+), 22 deletions(-) (limited to 'src/soc/intel/skylake/acpi/pch.asl') diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 2621eb287d..18a41f25b3 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 Google Inc. * Copyright (C) 2015 Intel Corporation. * * This program is free software; you can redistribute it and/or modify @@ -20,38 +20,34 @@ */ #include +#include +#include +#include +#include -Scope (\) -{ - /* IO-Trap at 0x800. - * This is the ACPI->SMI communication interface. - */ - OperationRegion (IO_T, SystemIO, 0x800, 0x10) - Field (IO_T, ByteAcc, NoLock, Preserve) - { - Offset (0x8), - TRP0, 8 /* IO-Trap at 0x808 */ - } -} +/* GPIO Controller */ +#include "gpio.asl" + +/* Interrupt Routing */ +#include "irqlinks.asl" -/* PCI Express Ports 0:1c.x */ +/* LPC 0:1f.0 */ +#include "lpc.asl" + +/* PCIE Ports */ #include "pcie.asl" -/* USB XHCI 0:14.0 */ -#include "xhci.asl" -/* LPC Bridge 0:1f.0 */ -#include "lpc.asl" +/* Serial IO */ +#include "serialio.asl" /* SMBus 0:1f.3 */ #include "smbus.asl" -/* Serial IO */ -#include "serialio.asl" -/* Interrupt Routing */ #include "itss.asl" -#include "irqlinks.asl" +/* USB XHCI 0:14.0 */ +#include "xhci.asl" Method (_OSC, 4) { -- cgit v1.2.3