From 43c31096965a05bc5ac0da0a7fb701167e9fb68e Mon Sep 17 00:00:00 2001 From: Bora Guvendik Date: Tue, 11 Apr 2017 16:05:23 -0700 Subject: soc/intel/skylake: Use ITSS common code This patch uses common ITSS library to setup itss irq. Change-Id: Ibe65a92f1604277bec229c67f4375b6636c0972d Signed-off-by: Bora Guvendik Reviewed-on: https://review.coreboot.org/19244 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/include/soc/itss.h | 24 +++--------------------- 1 file changed, 3 insertions(+), 21 deletions(-) (limited to 'src/soc/intel/skylake/include') diff --git a/src/soc/intel/skylake/include/soc/itss.h b/src/soc/intel/skylake/include/soc/itss.h index 0681e9d5dd..5ff9bb1e55 100644 --- a/src/soc/intel/skylake/include/soc/itss.h +++ b/src/soc/intel/skylake/include/soc/itss.h @@ -16,26 +16,8 @@ #ifndef SOC_INTEL_SKL_ITSS_H #define SOC_INTEL_SKL_ITSS_H -/* Max PXRC registers in ITSS*/ -#define MAX_PXRC_CONFIG 0x08 - -/* PIRQA Routing Control Register*/ -#define PCR_ITSS_PIRQA_ROUT 0x3100 -/* PIRQB Routing Control Register*/ -#define PCR_ITSS_PIRQB_ROUT 0x3101 -/* PIRQC Routing Control Register*/ -#define PCR_ITSS_PIRQC_ROUT 0x3102 -/* PIRQD Routing Control Register*/ -#define PCR_ITSS_PIRQD_ROUT 0x3103 -/* PIRQE Routing Control Register*/ -#define PCR_ITSS_PIRQE_ROUT 0x3104 -/* PIRQF Routing Control Register*/ -#define PCR_ITSS_PIRQF_ROUT 0x3105 -/* PIRQG Routing Control Register*/ -#define PCR_ITSS_PIRQG_ROUT 0x3106 -/* PIRQH Routing Control Register*/ -#define PCR_ITSS_PIRQH_ROUT 0x3107 -/* ITSS Power reduction control */ -#define PCR_ITSS_ITSSPRC 0x3300 +#define ITSS_MAX_IRQ 119 +#define IRQS_PER_IPC 32 +#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) #endif /* SOC_INTEL_SKL_ITSS_H */ -- cgit v1.2.3