From c76e9982b231023ccf91b79ec7526e50f595ffc1 Mon Sep 17 00:00:00 2001
From: "Sooi, Li Cheng"
Date: Wed, 4 Jan 2017 13:36:06 +0800
Subject: soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for
SKL/KBL HALO SOC
Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO SOC
Change-Id: I6a44d55d1588d2620bd1179ea7dc327922f49fd7
Signed-off-by: Sooi, Li Cheng
Reviewed-on: https://review.coreboot.org/18028
Reviewed-by: Aaron Durbin
Tested-by: build bot (Jenkins)
---
src/soc/intel/skylake/include/soc/cpu.h | 4 ++++
src/soc/intel/skylake/include/soc/pch.h | 3 +++
src/soc/intel/skylake/include/soc/systemagent.h | 6 ++++++
3 files changed, 13 insertions(+)
(limited to 'src/soc/intel/skylake/include')
diff --git a/src/soc/intel/skylake/include/soc/cpu.h b/src/soc/intel/skylake/include/soc/cpu.h
index ecb9833277..35a30819b2 100644
--- a/src/soc/intel/skylake/include/soc/cpu.h
+++ b/src/soc/intel/skylake/include/soc/cpu.h
@@ -26,8 +26,12 @@
/* Supported CPUIDs */
#define CPUID_SKYLAKE_C0 0x406e2
#define CPUID_SKYLAKE_D0 0x406e3
+#define CPUID_SKYLAKE_HQ0 0x506e1
+#define CPUID_SKYLAKE_HR0 0x506e3
#define CPUID_KABYLAKE_G0 0x406e8
#define CPUID_KABYLAKE_H0 0x806e9
+#define CPUID_KABYLAKE_HA0 0x506e8
+#define CPUID_KABYLAKE_HB0 0x906e9
/* CPU bus clock is fixed at 100MHz */
#define CPU_BCLK 100
diff --git a/src/soc/intel/skylake/include/soc/pch.h b/src/soc/intel/skylake/include/soc/pch.h
index 701a6f5edf..9be75bf98f 100644
--- a/src/soc/intel/skylake/include/soc/pch.h
+++ b/src/soc/intel/skylake/include/soc/pch.h
@@ -26,6 +26,9 @@
#define PCH_SPT_LP_U_BASE 0x9d43
#define PCH_SPT_LP_U_PREMIUM 0x9d48
#define PCH_SPT_LP_Y_PREMIUM 0x9d46
+#define PCH_SPT_H_C236 0xa150
+#define PCH_SPT_H_PREMIUM 0xa14e
+#define PCH_SPT_H_QM170 0xa14d
#define PCH_KBL_LP_Y_PREMIUM_HDCP22 0x9d4b
#define PCH_KBL_LP_U_PREMIUM 0x9d58
#define PCH_KBL_LP_Y_PREMIUM 0x9d56
diff --git a/src/soc/intel/skylake/include/soc/systemagent.h b/src/soc/intel/skylake/include/soc/systemagent.h
index 6353ea627e..c82f6913b2 100644
--- a/src/soc/intel/skylake/include/soc/systemagent.h
+++ b/src/soc/intel/skylake/include/soc/systemagent.h
@@ -25,15 +25,21 @@
#define IGD_SKYLAKE_GT1_SULTM 0x1906
#define IGD_SKYLAKE_GT2_SULXM 0x191E
#define IGD_SKYLAKE_GT2_SULTM 0x1916
+#define IGD_SKYLAKE_GT2_SHALM 0x191B
+#define IGD_SKYLAKE_GT4_SHALM 0x193D
#define IGD_KABYLAKE_GT1_SULTM 0x5906
#define IGD_KABYLAKE_GT2_SULXM 0x591E
#define IGD_KABYLAKE_GT2_SULTM 0x5916
+#define IGD_KABYLAKE_GT2_SHALM 0x591B
#define MCH_SKYLAKE_ID_U 0x1904
#define MCH_SKYLAKE_ID_Y 0x190c
#define MCH_SKYLAKE_ID_ULX 0x1924
+#define MCH_SKYLAKE_ID_H 0x1910
+#define MCH_SKYLAKE_ID_H_EM 0x1918
#define MCH_KABYLAKE_ID_U 0x5904
#define MCH_KABYLAKE_ID_Y 0x590c
+#define MCH_KABYLAKE_ID_H 0x5910
/* Device 0:0.0 PCI configuration space */
--
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