From e33a1724b34d839fae16836a5bdde4d53a788c15 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 30 Jul 2015 16:52:56 -0500 Subject: skylake: fix serial port with new code base Many Kconfig options changed in coreboot.org since skylake was first started. Fix Kconfig option name changes, and also provide a common option, UART_DEBUG that can be selected to select all the necessary options. Note: It's still a requirement to manually unset the 8250IO option because that's unconditionally set. BUG=chrome-os-partner:43419 BUG=chrome-os-partner:43463 BRANCH=None TEST=Built glados. Booted into kernel. Kernel reboots somewhere. Original-Change-Id: I9e6549ea0f1d6b9ffe64a73856ec87b5bc7b7091 Original-Signed-off-by: Aaron Durbin Original-Reviewed-on: https://chromium-review.googlesource.com/289951 Original-Reviewed-by: Duncan Laurie Change-Id: I0e6b492d7279cc35d4fb3ac17fd727177adce39d Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11172 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/skylake/uart_debug.c | 41 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 src/soc/intel/skylake/uart_debug.c (limited to 'src/soc/intel/skylake/uart_debug.c') diff --git a/src/soc/intel/skylake/uart_debug.c b/src/soc/intel/skylake/uart_debug.c new file mode 100644 index 0000000000..03285077b9 --- /dev/null +++ b/src/soc/intel/skylake/uart_debug.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include +#include +#include +#include + +unsigned int uart_platform_refclk(void) +{ + /* + * Set M and N divisor inputs and enable clock. + * Main reference frequency to UART is: + * 120MHz * M / N = 120MHz * 48 / 3125 = 1843200Hz + * The different order below is to handle integer math overflow. + */ + return 120 * MHz / SIO_REG_PPR_CLOCK_N_DIV * SIO_REG_PPR_CLOCK_M_DIV; +} + +uintptr_t uart_platform_base(int idx) +{ + /* Same base address for all debug port usage. In reality UART2 + * is currently only supported. */ + return UART_DEBUG_BASE_ADDRESS; +} -- cgit v1.2.3