From e4844ce7c93b97adad543dc868a302d34f9e0282 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 17 Apr 2021 12:49:08 +0200 Subject: soc/intel/skylake: Move acpi_sci_irq() to acpi.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I8bc170bd715e13d46fcedc0f796e2a99786791c0 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52462 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Michael Niewöhner Reviewed-by: Frans Hendriks --- src/soc/intel/skylake/acpi.c | 28 ++++++++++++++++++++++++++++ src/soc/intel/skylake/fadt.c | 1 + src/soc/intel/skylake/include/soc/acpi.h | 2 ++ src/soc/intel/skylake/include/soc/pm.h | 3 --- src/soc/intel/skylake/pmutil.c | 28 ---------------------------- 5 files changed, 31 insertions(+), 31 deletions(-) (limited to 'src/soc/intel/skylake') diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 3434aac9bb..51fea18bf9 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -475,6 +475,34 @@ unsigned long northbridge_write_acpi_tables(const struct device *const dev, return current; } +int acpi_sci_irq(void) +{ + int scis = pci_read_config32(PCH_DEV_PMC, ACTL) & SCI_IRQ_SEL; + int sci_irq = 9; + + /* Determine how SCI is routed. */ + switch (scis) { + case SCIS_IRQ9: + case SCIS_IRQ10: + case SCIS_IRQ11: + sci_irq = scis - SCIS_IRQ9 + 9; + break; + case SCIS_IRQ20: + case SCIS_IRQ21: + case SCIS_IRQ22: + case SCIS_IRQ23: + sci_irq = scis - SCIS_IRQ20 + 20; + break; + default: + printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n"); + sci_irq = 9; + break; + } + + printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq); + return sci_irq; +} + unsigned long acpi_madt_irq_overrides(unsigned long current) { int sci = acpi_sci_irq(); diff --git a/src/soc/intel/skylake/fadt.c b/src/soc/intel/skylake/fadt.c index c8e4ec4fb6..3e60216fba 100644 --- a/src/soc/intel/skylake/fadt.c +++ b/src/soc/intel/skylake/fadt.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include "chip.h" diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h index e12a748291..683a50490a 100644 --- a/src/soc/intel/skylake/include/soc/acpi.h +++ b/src/soc/intel/skylake/include/soc/acpi.h @@ -11,6 +11,8 @@ #define PSS_LATENCY_TRANSITION 10 #define PSS_LATENCY_BUSMASTER 10 +/* Return the selected ACPI SCI IRQ */ +int acpi_sci_irq(void); unsigned long acpi_madt_irq_overrides(unsigned long current); unsigned long northbridge_write_acpi_tables(const struct device *, unsigned long current, struct acpi_rsdp *); diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index cd5c43e9b7..a57772446e 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -155,9 +155,6 @@ struct chipset_power_state { uint32_t prev_sleep_state; } __packed; -/* Return the selected ACPI SCI IRQ */ -int acpi_sci_irq(void); - /* Get base address PMC memory mapped registers. */ uint8_t *pmc_mmio_regs(void); diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 906a1cf56f..115a9e58ec 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -113,34 +113,6 @@ const char *const *soc_std_gpe_sts_array(size_t *gpe_arr) return gpe_sts_bits; } -int acpi_sci_irq(void) -{ - int scis = pci_read_config32(PCH_DEV_PMC, ACTL) & SCI_IRQ_SEL; - int sci_irq = 9; - - /* Determine how SCI is routed. */ - switch (scis) { - case SCIS_IRQ9: - case SCIS_IRQ10: - case SCIS_IRQ11: - sci_irq = scis - SCIS_IRQ9 + 9; - break; - case SCIS_IRQ20: - case SCIS_IRQ21: - case SCIS_IRQ22: - case SCIS_IRQ23: - sci_irq = scis - SCIS_IRQ20 + 20; - break; - default: - printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n"); - sci_irq = 9; - break; - } - - printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq); - return sci_irq; -} - uint8_t *pmc_mmio_regs(void) { uint32_t reg32; -- cgit v1.2.3