From e685107dd61461f91d3fdbf722cf378e121e2551 Mon Sep 17 00:00:00 2001 From: "derek.huang" Date: Thu, 23 Apr 2020 14:55:24 +0800 Subject: soc/intel/tigerlake: Print HPR_CAUSE0 register In addition to GBLRST_CAUSE0 and GBLRST_CAUSE1, print the value of HPR_CAUSE0. Change-Id: Idc57c3cd6a8d156c5544640898e8e7147d34c535 Signed-off-by: derek.huang Reviewed-on: https://review.coreboot.org/c/coreboot/+/40648 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/tigerlake/include/soc/pm.h | 1 + src/soc/intel/tigerlake/include/soc/pmc.h | 4 ++++ 2 files changed, 5 insertions(+) (limited to 'src/soc/intel/tigerlake/include') diff --git a/src/soc/intel/tigerlake/include/soc/pm.h b/src/soc/intel/tigerlake/include/soc/pm.h index c42e280ed1..c69fe3edb8 100644 --- a/src/soc/intel/tigerlake/include/soc/pm.h +++ b/src/soc/intel/tigerlake/include/soc/pm.h @@ -150,6 +150,7 @@ struct chipset_power_state { uint32_t gen_pmcon_a; uint32_t gen_pmcon_b; uint32_t gblrst_cause[2]; + uint32_t hpr_cause0; uint32_t prev_sleep_state; } __packed; diff --git a/src/soc/intel/tigerlake/include/soc/pmc.h b/src/soc/intel/tigerlake/include/soc/pmc.h index 88c6f61d94..9ad3391348 100644 --- a/src/soc/intel/tigerlake/include/soc/pmc.h +++ b/src/soc/intel/tigerlake/include/soc/pmc.h @@ -119,6 +119,10 @@ #define GBLRST_CAUSE0 0x1924 #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define HPR_CAUSE0 0x192C +#define HPR_CAUSE0_MI_HRPD (1 << 10) +#define HPR_CAUSE0_MI_HRPC (1 << 9) +#define HPR_CAUSE0_MI_HR (1 << 8) #define CPPMVRIC 0x1B1C #define XTALSDQDIS (1 << 22) -- cgit v1.2.3