From e07ea4cd38c5c232515a8755d2b4fbff6f12b949 Mon Sep 17 00:00:00 2001
From: Jingle Hsu <jingle_hsu@wiwynn.com>
Date: Wed, 1 Jul 2020 18:26:49 +0800
Subject: soc/intel/xeon_sp: Add RTC failure checking

Add a weak function mainboard_rtc_failed() for mainboard customization.

Check RTC_PWR_STS bit for RTC battery removal or CMOS clear jumper
triggered event.

Signed-off-by: Jingle Hsu <jingle_hsu@wiwynn.com>
Change-Id: Ic6da84277e71a5c51dfa4d97d5d0c0184478e8f0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/soc/intel/xeon_sp/pmutil.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 src/soc/intel/xeon_sp/pmutil.c

(limited to 'src/soc/intel/xeon_sp/pmutil.c')

diff --git a/src/soc/intel/xeon_sp/pmutil.c b/src/soc/intel/xeon_sp/pmutil.c
new file mode 100644
index 0000000000..9ab63a4f0b
--- /dev/null
+++ b/src/soc/intel/xeon_sp/pmutil.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * Helper functions for dealing with power management registers
+ * and the differences between PCH variants.
+ */
+
+#include <intelblocks/rtc.h>
+#include <soc/pmc.h>
+#include <soc/pci_devs.h>
+#include <device/pci.h>
+#include <console/console.h>
+
+int soc_get_rtc_failed(void)
+{
+	uint32_t pmcon_b = pci_s_read_config32(PCH_DEV_PMC, GEN_PMCON_B);
+	int rtc_fail = !!(pmcon_b & RTC_BATTERY_DEAD);
+
+	if (rtc_fail)
+		printk(BIOS_ERR, "%s: RTC battery dead or removed\n", __func__);
+
+	return rtc_fail;
+}
-- 
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