From 58e1e0aee938a5a539c35ae52bfe718e41f7b224 Mon Sep 17 00:00:00 2001 From: Tim Chu Date: Mon, 28 Dec 2020 00:08:53 -0800 Subject: mb/ocp/deltalake: Override DDR frequency limit via VPD variable Use VPD variable "fsp_dimm_freq" to select DDR frequency limit. Tested=On OCP Delta Lake, DDR frequency limit can be changed via VPD. Signed-off-by: Tim Chu Change-Id: I1232feae5090420d8fa42596b46f2d4dcaf9d635 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48946 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Zhang --- src/soc/intel/xeon_sp/cpx/chip.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'src/soc/intel/xeon_sp') diff --git a/src/soc/intel/xeon_sp/cpx/chip.h b/src/soc/intel/xeon_sp/cpx/chip.h index 1311678116..abd358efab 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.h +++ b/src/soc/intel/xeon_sp/cpx/chip.h @@ -31,6 +31,21 @@ typedef enum { PcieGen3 } pcie_link_speed; +/** + enum for DDR Frequency Limit + **/ +enum ddr_freq_limit { + DDR_AUTO = 0x0, + DDR_1333 = 0x5, + DDR_1600 = 0x7, + DDR_1866 = 0x9, + DDR_2133 = 0xb, + DDR_2400 = 0xd, + DDR_2666 = 0xf, + DDR_2933 = 0x11, + DDR_3200 = 0x13 +}; + struct soc_intel_xeon_sp_cpx_config { /* Common struct containing soc config data required by common code */ struct soc_intel_common_config common_soc_config; -- cgit v1.2.3