From 854782330ccd3f92d1b09bd006ddf127ba188cba Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Thu, 28 May 2020 17:29:45 +0200
Subject: src: Remove unused 'include <stdint.h>

Found using:
diff <(git grep -l '#include <stdint.h>' -- src/) <(git grep -l 'int8_t\|int16_t\|int32_t\|int64_t\|intptr_t\|intmax_t\|s8\|u8\|s16\|u16\|s32\|u32\|s64\|u64\|INT8_MIN\|INT8_MAX\|INT16_MIN\|INT16_MAX\|INT32_MIN\|INT32_MAX\|INT64_MIN\|INT64_MAX\|INTMAX_MIN\|INTMAX_MAX' -- src/) |grep -v vendorcode |grep '<'

Change-Id: I5e14bf4887c7d2644a64f4d58c6d8763eb74d2ed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41827
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/baytrail/include/soc/romstage.h            | 1 -
 src/soc/intel/braswell/include/soc/romstage.h            | 1 -
 src/soc/intel/broadwell/include/soc/romstage.h           | 1 -
 src/soc/intel/cannonlake/include/soc/pch.h               | 1 -
 src/soc/intel/common/block/include/intelblocks/pcie_rp.h | 1 -
 src/soc/intel/common/block/smbus/smbuslib.h              | 1 -
 src/soc/intel/common/mma.h                               | 1 -
 src/soc/intel/common/pch/include/intelpch/lockdown.h     | 1 -
 src/soc/intel/icelake/include/soc/pch.h                  | 1 -
 src/soc/intel/jasperlake/include/soc/espi.h              | 1 -
 src/soc/intel/jasperlake/include/soc/pch.h               | 1 -
 src/soc/intel/jasperlake/me.c                            | 1 -
 src/soc/intel/tigerlake/include/soc/espi.h               | 1 -
 src/soc/intel/tigerlake/include/soc/pch.h                | 1 -
 14 files changed, 14 deletions(-)

(limited to 'src/soc/intel')

diff --git a/src/soc/intel/baytrail/include/soc/romstage.h b/src/soc/intel/baytrail/include/soc/romstage.h
index a7b7fce92c..156fc31b80 100644
--- a/src/soc/intel/baytrail/include/soc/romstage.h
+++ b/src/soc/intel/baytrail/include/soc/romstage.h
@@ -3,7 +3,6 @@
 #ifndef _BAYTRAIL_ROMSTAGE_H_
 #define _BAYTRAIL_ROMSTAGE_H_
 
-#include <stdint.h>
 #include <soc/mrc_wrapper.h>
 
 void mainboard_fill_mrc_params(struct mrc_params *mp);
diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h
index de890fd334..2cf9afa633 100644
--- a/src/soc/intel/braswell/include/soc/romstage.h
+++ b/src/soc/intel/braswell/include/soc/romstage.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_ROMSTAGE_H_
 #define _SOC_ROMSTAGE_H_
 
-#include <stdint.h>
 #include <fsp/romstage.h>
 #include <fsp/util.h>
 #include <soc/pm.h>
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index 2c7b0a46cc..f45419c10b 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -3,7 +3,6 @@
 #ifndef _BROADWELL_ROMSTAGE_H_
 #define _BROADWELL_ROMSTAGE_H_
 
-#include <stdint.h>
 #include <soc/pei_data.h>
 
 struct chipset_power_state;
diff --git a/src/soc/intel/cannonlake/include/soc/pch.h b/src/soc/intel/cannonlake/include/soc/pch.h
index 754eabbb3f..778b26981b 100644
--- a/src/soc/intel/cannonlake/include/soc/pch.h
+++ b/src/soc/intel/cannonlake/include/soc/pch.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_CANNONLAKE_PCH_H_
 #define _SOC_CANNONLAKE_PCH_H_
 
-#include <stdint.h>
 
 #define PCH_H				1
 #define PCH_LP				2
diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
index c75e05584a..5f5aab52f4 100644
--- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
+++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_BLOCK_PCIE_RP_H
 #define SOC_INTEL_COMMON_BLOCK_PCIE_RP_H
 
-#include <stdint.h>
 
 /*
  * The PCIe Root Ports usually come in groups of up to 8 PCI-device
diff --git a/src/soc/intel/common/block/smbus/smbuslib.h b/src/soc/intel/common/block/smbus/smbuslib.h
index 2d8774c689..05cecf351b 100644
--- a/src/soc/intel/common/block/smbus/smbuslib.h
+++ b/src/soc/intel/common/block/smbus/smbuslib.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H
 #define SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H
 
-#include <stdint.h>
 
 /* SMBus IO Base Address */
 #define SMBUS_IO_BASE	0xefa0
diff --git a/src/soc/intel/common/mma.h b/src/soc/intel/common/mma.h
index 2e0121088a..e58edaf518 100644
--- a/src/soc/intel/common/mma.h
+++ b/src/soc/intel/common/mma.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_MMA_H_
 #define _SOC_MMA_H_
 
-#include <stdint.h>
 #include <commonlib/region.h>
 
 struct mma_config_param {
diff --git a/src/soc/intel/common/pch/include/intelpch/lockdown.h b/src/soc/intel/common/pch/include/intelpch/lockdown.h
index 72deebdcd5..17b8cbc0e9 100644
--- a/src/soc/intel/common/pch/include/intelpch/lockdown.h
+++ b/src/soc/intel/common/pch/include/intelpch/lockdown.h
@@ -3,7 +3,6 @@
 #ifndef SOC_INTEL_COMMON_PCH_LOCKDOWN_H
 #define SOC_INTEL_COMMON_PCH_LOCKDOWN_H
 
-#include <stdint.h>
 
 /*
  * This function will get lockdown config specific to soc.
diff --git a/src/soc/intel/icelake/include/soc/pch.h b/src/soc/intel/icelake/include/soc/pch.h
index c66808be54..cbba2b43ef 100644
--- a/src/soc/intel/icelake/include/soc/pch.h
+++ b/src/soc/intel/icelake/include/soc/pch.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_ICELAKE_PCH_H_
 #define _SOC_ICELAKE_PCH_H_
 
-#include <stdint.h>
 
 #define PCH_H				1
 #define PCH_LP				2
diff --git a/src/soc/intel/jasperlake/include/soc/espi.h b/src/soc/intel/jasperlake/include/soc/espi.h
index 77975340eb..5c99adba38 100644
--- a/src/soc/intel/jasperlake/include/soc/espi.h
+++ b/src/soc/intel/jasperlake/include/soc/espi.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_JASPERLAKE_ESPI_H_
 #define _SOC_JASPERLAKE_ESPI_H_
 
-#include <stdint.h>
 
 /* PCI Configuration Space (D31:F0): ESPI */
 #define SCI_IRQ_SEL		(7 << 0)
diff --git a/src/soc/intel/jasperlake/include/soc/pch.h b/src/soc/intel/jasperlake/include/soc/pch.h
index 1a6396d377..db62c8649a 100644
--- a/src/soc/intel/jasperlake/include/soc/pch.h
+++ b/src/soc/intel/jasperlake/include/soc/pch.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_JASPERLAKE_PCH_H_
 #define _SOC_JASPERLAKE_PCH_H_
 
-#include <stdint.h>
 
 #define PCIE_CLK_NOTUSED		0xFF
 #define PCIE_CLK_LAN			0x70
diff --git a/src/soc/intel/jasperlake/me.c b/src/soc/intel/jasperlake/me.c
index e4dc93feb4..b40b4dc2e5 100644
--- a/src/soc/intel/jasperlake/me.c
+++ b/src/soc/intel/jasperlake/me.c
@@ -4,7 +4,6 @@
 #include <intelblocks/cse.h>
 #include <console/console.h>
 #include <soc/me.h>
-#include <stdint.h>
 
 static void dump_me_status(void *unused)
 {
diff --git a/src/soc/intel/tigerlake/include/soc/espi.h b/src/soc/intel/tigerlake/include/soc/espi.h
index 449eb63074..6a86147018 100644
--- a/src/soc/intel/tigerlake/include/soc/espi.h
+++ b/src/soc/intel/tigerlake/include/soc/espi.h
@@ -9,7 +9,6 @@
 #ifndef _SOC_TIGERLAKE_ESPI_H_
 #define _SOC_TIGERLAKE_ESPI_H_
 
-#include <stdint.h>
 
 /* PCI Configuration Space (D31:F0): ESPI */
 #define SCI_IRQ_SEL		(7 << 0)
diff --git a/src/soc/intel/tigerlake/include/soc/pch.h b/src/soc/intel/tigerlake/include/soc/pch.h
index 457b616dd0..ad0186adc4 100644
--- a/src/soc/intel/tigerlake/include/soc/pch.h
+++ b/src/soc/intel/tigerlake/include/soc/pch.h
@@ -3,7 +3,6 @@
 #ifndef _SOC_TIGERLAKE_PCH_H_
 #define _SOC_TIGERLAKE_PCH_H_
 
-#include <stdint.h>
 
 #define PCIE_CLK_NOTUSED		0xFF
 #define PCIE_CLK_LAN			0x70
-- 
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