From f4aa501ecacb3cbc3774d01b5f9209f71bd578cf Mon Sep 17 00:00:00 2001 From: Christian Walter Date: Tue, 13 Aug 2019 15:09:10 +0200 Subject: soc/intel/cannonlake: Add 4E/4F to early io init This is needed for the AST2500 to work, because it uses 4E/4F. Change-Id: Ie47474e9bf1edfe98555a148469c41283e9a4ea6 Signed-off-by: Christian Walter Reviewed-on: https://review.coreboot.org/c/coreboot/+/34862 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese Reviewed-by: Felix Held Reviewed-by: Frans Hendriks --- src/soc/intel/cannonlake/bootblock/pch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index c43d6d8bd1..a3252c2560 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -159,7 +159,7 @@ static int pch_check_decode_enable(void) void pch_early_iorange_init(void) { - uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | + uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66 | LPC_IOE_LGE_200; /* IO Decode Range */ -- cgit v1.2.3