From 026be3d76f3934eb901485acd98e0d84f137068f Mon Sep 17 00:00:00 2001 From: Mengqi Zhang Date: Wed, 24 Apr 2019 11:11:52 +0800 Subject: mediatek: Add SPI tick_dly setting Add spi tick_dly setting for high-speed spi xfer. BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; emerge-elm coreboot Change-Id: Ie49fc3efe2a4a6dcdf2a2fc4c91b47e35d4f086e Signed-off-by: Mengqi Zhang Reviewed-on: https://review.coreboot.org/c/coreboot/+/32461 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/mediatek/common/include/soc/spi_common.h | 5 +++-- src/soc/mediatek/common/spi.c | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'src/soc/mediatek/common') diff --git a/src/soc/mediatek/common/include/soc/spi_common.h b/src/soc/mediatek/common/include/soc/spi_common.h index 162db59f94..81a9098180 100644 --- a/src/soc/mediatek/common/include/soc/spi_common.h +++ b/src/soc/mediatek/common/include/soc/spi_common.h @@ -84,8 +84,9 @@ extern struct mtk_spi_bus spi_bus[]; void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select); -void mtk_spi_set_timing(struct mtk_spi_regs *regs, u32 sck_ticks, u32 cs_ticks); +void mtk_spi_set_timing(struct mtk_spi_regs *regs, u32 sck_ticks, u32 cs_ticks, + unsigned int tick_dly); void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, - unsigned int speed_hz); + unsigned int speed_hz, unsigned int tick_dly); #endif diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c index 71ed95a228..1af6f105c3 100644 --- a/src/soc/mediatek/common/spi.c +++ b/src/soc/mediatek/common/spi.c @@ -53,7 +53,7 @@ static void spi_sw_reset(struct mtk_spi_regs *regs) } void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, - unsigned int speed_hz) + unsigned int speed_hz, unsigned int tick_dly) { u32 div, sck_ticks, cs_ticks; @@ -73,7 +73,7 @@ void mtk_spi_init(unsigned int bus, enum spi_pad_mask pad_select, printk(BIOS_DEBUG, "SPI%u(PAD%u) initialized at %u Hz\n", bus, pad_select, SPI_HZ / (sck_ticks * 2)); - mtk_spi_set_timing(regs, sck_ticks, cs_ticks); + mtk_spi_set_timing(regs, sck_ticks, cs_ticks, tick_dly); clrsetbits_le32(®s->spi_cmd_reg, (SPI_CMD_CPHA_EN | SPI_CMD_CPOL_EN | -- cgit v1.2.3