From d21a329866a1299b180f8b14b6c73bee3d754e57 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 19 Feb 2015 14:08:04 -0800 Subject: arm(64): Replace write32() and friends with writel() This patch is a raw application of the following spatch to the directories src/arch/arm(64)?, src/mainboard/, src/soc/ and src/drivers/gic: @@ expression A, V; @@ - write32(V, A) + writel(V, A) @@ expression A, V; @@ - write16(V, A) + writew(V, A) @@ expression A, V; @@ - write8(V, A) + writeb(V, A) This replaces all uses of write{32,16,8}() with write{l,w,b}() which is currently equivalent and much more common. This is a preparatory step that will allow us to easier flip them all at once to the new write32(a,v) model. BRANCH=none BUG=chromium:451388 TEST=Compiled Cosmos, Daisy, Blaze, Pit, Ryu, Storm and Pinky. Change-Id: I16016cd77780e7cadbabe7d8aa7ab465b95b8f09 Signed-off-by: Patrick Georgi Original-Commit-Id: 93f0ada19b429b4e30d67335b4e61d0f43597b24 Original-Change-Id: I1ac01c67efef4656607663253ed298ff4d0ef89d Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/254862 Reviewed-on: http://review.coreboot.org/9834 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/nvidia/tegra124/spi.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'src/soc/nvidia/tegra124/spi.c') diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c index aefb4da0d6..0584177d5e 100644 --- a/src/soc/nvidia/tegra124/spi.c +++ b/src/soc/nvidia/tegra124/spi.c @@ -230,7 +230,7 @@ int spi_claim_bus(struct spi_slave *slave) else val |= SPI_CMD1_CS_SW_VAL; - write32(val, ®s->command1); + writel(val, ®s->command1); return 0; } @@ -246,7 +246,7 @@ void spi_release_bus(struct spi_slave *slave) else val &= ~SPI_CMD1_CS_SW_VAL; - write32(val, ®s->command1); + writel(val, ®s->command1); } static void dump_fifo_status(struct tegra_spi_channel *spi) @@ -383,12 +383,12 @@ static int tegra_spi_pio_prepare(struct tegra_spi_channel *spi, /* BLOCK_SIZE in SPI_DMA_BLK register applies to both DMA and * PIO transfers */ - write32(todo - 1, &spi->regs->dma_blk); + writel(todo - 1, &spi->regs->dma_blk); if (dir == SPI_SEND) { unsigned int to_fifo = bytes; while (to_fifo) { - write32(*p, &spi->regs->tx_fifo); + writel(*p, &spi->regs->tx_fifo); p++; to_fifo--; } @@ -493,11 +493,11 @@ static int tegra_spi_dma_prepare(struct tegra_spi_channel *spi, /* ensure bytes to send will be visible to DMA controller */ dcache_clean_by_mva(spi->out_buf, bytes); - write32((u32)&spi->regs->tx_fifo, &spi->dma_out->regs->apb_ptr); - write32((u32)spi->out_buf, &spi->dma_out->regs->ahb_ptr); + writel((u32)&spi->regs->tx_fifo, &spi->dma_out->regs->apb_ptr); + writel((u32)spi->out_buf, &spi->dma_out->regs->ahb_ptr); setbits_le32(&spi->dma_out->regs->csr, APB_CSR_DIR); setup_dma_params(spi, spi->dma_out); - write32(wcount, &spi->dma_out->regs->wcount); + writel(wcount, &spi->dma_out->regs->wcount); } else { spi->dma_in = dma_claim(); if (!spi->dma_in) @@ -506,15 +506,15 @@ static int tegra_spi_dma_prepare(struct tegra_spi_channel *spi, /* avoid data collisions */ dcache_clean_invalidate_by_mva(spi->in_buf, bytes); - write32((u32)&spi->regs->rx_fifo, &spi->dma_in->regs->apb_ptr); - write32((u32)spi->in_buf, &spi->dma_in->regs->ahb_ptr); + writel((u32)&spi->regs->rx_fifo, &spi->dma_in->regs->apb_ptr); + writel((u32)spi->in_buf, &spi->dma_in->regs->ahb_ptr); clrbits_le32(&spi->dma_in->regs->csr, APB_CSR_DIR); setup_dma_params(spi, spi->dma_in); - write32(wcount, &spi->dma_in->regs->wcount); + writel(wcount, &spi->dma_in->regs->wcount); } /* BLOCK_SIZE starts at n-1 */ - write32(todo - 1, &spi->regs->dma_blk); + writel(todo - 1, &spi->regs->dma_blk); return todo; } -- cgit v1.2.3