From 1ac4e591bfcfd135ab46843fcbee0342e21a8689 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Fri, 27 Jun 2014 16:43:59 -0500 Subject: t132: Add shared romstage There's no reason to duplicate code in the mainboards. Therefore, drive the flow of romstage boot in the SoC. This allows for easier scaling with multiple devices. BUG=None BRANCH=None TEST=Built and booted to same place as before. Original-Change-Id: I0d4df84034b19353daad0da1f722b820596c4f55 Original-Signed-off-by: Aaron Durbin Original-Reviewed-on: https://chromium-review.googlesource.com/205992 Original-Reviewed-by: Furquan Shaikh (cherry picked from commit de4310af6f6dbeedd7432683d1d1fe12ce48f46e) Signed-off-by: Marc Jones Change-Id: Ie74f0eb1c983aff92d3cbafb7fe7d9d7cb65ae19 Reviewed-on: http://review.coreboot.org/8575 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/nvidia/tegra132/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/nvidia/tegra132/Makefile.inc') diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc index 855ef24832..a98467431b 100644 --- a/src/soc/nvidia/tegra132/Makefile.inc +++ b/src/soc/nvidia/tegra132/Makefile.inc @@ -24,6 +24,7 @@ romstage-y += spi.c romstage-y += i2c.c romstage-y += dma.c romstage-y += monotonic_timer.c +romstage-y += romstage.c romstage-y += sdram.c romstage-y += sdram_lp0.c romstage-y += ../tegra/gpio.c -- cgit v1.2.3