From c41dfb0626eb06616c5d632f7f72c9af29fad331 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Sat, 9 Aug 2014 01:55:28 -0700 Subject: t132: Implement clock initialization api for functional units This api provides a common interface to initialize various clock sources, dividers as well as enabling the clock for various functional units. BUG=chrome-os-partner:31251 BRANCH=None TEST=Compiles successfully for rush and boots till last known good point. Change-Id: I2b8df5abf7301bc940315427af4cb38a635f07f8 Signed-off-by: Patrick Georgi Original-Commit-Id: 9814f93a9f99fc9df6267167f991ebef427e9ae3 Original-Change-Id: I7abb193d6a9cfa448df1c48c346b4edbad802329 Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/211765 Original-Tested-by: Furquan Shaikh Original-Reviewed-by: Aaron Durbin Original-Commit-Queue: Furquan Shaikh Reviewed-on: http://review.coreboot.org/8921 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/nvidia/tegra132/clock.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/soc/nvidia/tegra132/clock.c') diff --git a/src/soc/nvidia/tegra132/clock.c b/src/soc/nvidia/tegra132/clock.c index fb8e85feee..ed5afbaa45 100644 --- a/src/soc/nvidia/tegra132/clock.c +++ b/src/soc/nvidia/tegra132/clock.c @@ -576,6 +576,14 @@ void clock_init(void) graphics_pll(); } +void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg, + u32 *rst_dev_clr_reg) +{ + writel(val, clk_enb_set_reg); + udelay(IO_STABILIZATION_DELAY); + writel(val, rst_dev_clr_reg); +} + void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x) { if (l) -- cgit v1.2.3