From e5bad5cd3d828eba06f1db66f43948f966e7b0e0 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Sat, 5 Sep 2015 10:27:12 -0500 Subject: verstage: use common program.ld for linking There's no reason to have a separate verstage.ld now that there is a unified stage linking strategy. Moreover verstage support is throughout the code base as it is so bring in those link script macros into the common memlayout.h as that removes one more specific thing a board/chipset needs to do in order to turn on verstage. BUG=chrome-os-partner:44827 BRANCH=None TEST=None Change-Id: I1195e06e06c1f81a758f68a026167689c19589dd Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11516 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/nvidia/tegra124/include/soc/memlayout.ld | 1 - src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld | 1 - src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld | 1 - 3 files changed, 3 deletions(-) (limited to 'src/soc/nvidia') diff --git a/src/soc/nvidia/tegra124/include/soc/memlayout.ld b/src/soc/nvidia/tegra124/include/soc/memlayout.ld index 2312cc93e3..561833df16 100644 --- a/src/soc/nvidia/tegra124/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra124/include/soc/memlayout.ld @@ -18,7 +18,6 @@ */ #include -#include #include diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld index 0f98fd2b3b..a8164a91a4 100644 --- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld +++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld @@ -18,7 +18,6 @@ */ #include -#include #include diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld index c140e013d9..dee67980d0 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld @@ -18,7 +18,6 @@ */ #include -#include #include -- cgit v1.2.3