From 46551573b48f225e1be230786f48e1c95d1c4287 Mon Sep 17 00:00:00 2001 From: David Dai Date: Wed, 9 May 2018 14:38:23 -0700 Subject: sdm845: Add clock support This sets up initial clock configuration for QUP and QSPI, and includes configuration of Root Clock Generators(RCG) and clock branches enablement. TEST=build & run Change-Id: I0b1d7f6daa179c0b24a97d42b66c1a9ee596b0a3 Signed-off-by: David Dai Reviewed-on: https://review.coreboot.org/c/25454 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/qualcomm/sdm845/Makefile.inc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/soc/qualcomm/sdm845/Makefile.inc') diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc index 507d91397f..fc8edd56e3 100644 --- a/src/soc/qualcomm/sdm845/Makefile.inc +++ b/src/soc/qualcomm/sdm845/Makefile.inc @@ -7,18 +7,21 @@ bootblock-y += spi.c bootblock-y += mmu.c bootblock-y += timer.c bootblock-y += gpio.c -bootblock-y += uart_bitbang.c +bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c +bootblock-y += clock.c ################################################################################ verstage-y += spi.c verstage-y += timer.c verstage-y += gpio.c +verstage-y += clock.c ################################################################################ romstage-y += spi.c romstage-y += cbmem.c romstage-y += timer.c romstage-y += gpio.c +romstage-y += clock.c ################################################################################ ramstage-y += soc.c @@ -26,6 +29,7 @@ ramstage-y += spi.c ramstage-y += cbmem.c ramstage-y += timer.c ramstage-y += gpio.c +ramstage-y += clock.c ################################################################################ -- cgit v1.2.3