From a12c6019b5221e52c8600410d83a55f596cc89a9 Mon Sep 17 00:00:00 2001
From: T Michael Turney <mturney@codeaurora.org>
Date: Tue, 27 Mar 2018 09:33:42 -0700
Subject: soc/qualcomm/sdm845: Add MMU support

Initialize 1st 4GB as Device Memory, except:
 * 1st page: NULL address
 * System_IMEM: Cached SRAM
 * Boot_IMEM: Cached SRAM

TEST=build

Change-Id: Ic6cf022b08bb2568fdf956cea8bad46da89236c5
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/25201
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/qualcomm/sdm845/Makefile.inc | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/qualcomm/sdm845/Makefile.inc')

diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc
index f55fea4add..bb27ef3f06 100644
--- a/src/soc/qualcomm/sdm845/Makefile.inc
+++ b/src/soc/qualcomm/sdm845/Makefile.inc
@@ -5,6 +5,7 @@ ifeq ($(CONFIG_SOC_QUALCOMM_SDM845),y)
 bootblock-y += bootblock.c
 bootblock-y += timer.c
 bootblock-y += spi.c
+bootblock-y += mmu.c
 
 ################################################################################
 verstage-y += timer.c
-- 
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