From 7f3ecedd776dc41a4d5dbaab8ef8146b8ba38ae3 Mon Sep 17 00:00:00 2001 From: Kan Yan Date: Thu, 30 Jun 2016 13:46:56 -0700 Subject: soc/qualcomm/ipq40xx: Reduce the delay in I2C. 3ms delay was found in testing to be sufficient for qup_i2c_write_fifo_flush(), but 1 additional ms was added to give additional headroom. Change the Delay from 10ms to 4ms. BUG=b:28942403 TEST=Boot up Gale board and the TPM functions normally. BRANCH=None Change-Id: I6821e2a101cc44e11d74eb6a6215aa9b848ae8c6 Signed-off-by: Martin Roth Original-Commit-Id: d93520fab15c5695ea18db21d0f3b24a108f204d Original-Change-Id: I202f5b8a1ef62bb039c56ba5a25b48b205cf4a67 Original-Signed-off-by: Kan Yan Original-Reviewed-on: https://chromium-review.googlesource.com/357961 Original-Reviewed-by: Suresh Rajashekara Original-Reviewed-by: SARAVANAKUMAR SUDALAI Reviewed-on: https://review.coreboot.org/16126 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/qualcomm/ipq40xx/qup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/qualcomm') diff --git a/src/soc/qualcomm/ipq40xx/qup.c b/src/soc/qualcomm/ipq40xx/qup.c index d2c1f282b6..9276e145bb 100644 --- a/src/soc/qualcomm/ipq40xx/qup.c +++ b/src/soc/qualcomm/ipq40xx/qup.c @@ -175,7 +175,7 @@ static inline qup_return_t qup_i2c_write_fifo_flush(blsp_qup_id_t id) qup_write32(QUP_ADDR(id, QUP_OPERATIONAL), OUTPUT_SERVICE_FLAG); - mdelay(10); /* TPM seems to need this */ + mdelay(4); /* TPM seems to need this */ ret = qup_fifo_wait_while(id, OUTPUT_FIFO_NOT_EMPTY); if (ret) -- cgit v1.2.3