From 0a36022b6919c93cb08dec08bd3d61bde4e42db5 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Mon, 28 Mar 2016 22:57:26 -0700 Subject: rockchip: refactor to sharing code among similar SOCs Upcoming designs are based on similar SOCs, this patch moves code which can be reused into a common directory under soc/rockchip. Changing spi.h to include stdder.h, as this is were check_member() is defined, this becomes necessary later when the new SOC code is added. Renaming UART driver private functions not to be bound to any particular SOC. BUG=none BRANCH=none TEST=the refactored code works fine on the new platform (with the rest of the patches applied). Change-Id: I39a505aecda8849daa58a8eca0e44a5243664423 Signed-off-by: Patrick Georgi Original-Commit-Id: f63f2582042ac115481207ddf329ea2e3260e55e Original-Change-Id: I3a1139305354d460492b25a45f3da315a9a0b49e Original-Signed-off-by: Vadim Bendebury Original-Reviewed-on: https://chromium-review.googlesource.com/335408 Original-Reviewed-by: Julius Werner Original-Reviewed-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/14235 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/rockchip/rk3288/Makefile.inc | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) (limited to 'src/soc/rockchip/rk3288/Makefile.inc') diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index 0df7eb712d..a76328742d 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -18,58 +18,59 @@ ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y) IDBTOOL = util/rockchip/make_idb.py bootblock-y += bootblock.c -bootblock-y += cbmem.c +bootblock-y += ../common/cbmem.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) -bootblock-$(CONFIG_DRIVERS_UART) += uart.c +bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c endif bootblock-y += timer.c bootblock-y += clock.c -bootblock-y += spi.c +bootblock-y += ../common/spi.c bootblock-y += gpio.c bootblock-y += i2c.c bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c -bootblock-y += rk808.c +bootblock-y += ../common/rk808.c -verstage-y += spi.c +verstage-y += ../common/spi.c verstage-y += timer.c -verstage-$(CONFIG_DRIVERS_UART) += uart.c +verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += gpio.c verstage-y += clock.c libverstage-y += crypto.c verstage-y += i2c.c verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c -romstage-y += cbmem.c +romstage-y += ../common/cbmem.c romstage-y += timer.c -romstage-$(CONFIG_DRIVERS_UART) += uart.c +romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += i2c.c romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c romstage-y += clock.c romstage-y += gpio.c -romstage-y += spi.c +romstage-y += ../common/spi.c romstage-y += sdram.c -romstage-y += rk808.c +romstage-y += ../common/rk808.c romstage-y += pwm.c romstage-y += tsadc.c ramstage-y += soc.c -ramstage-y += cbmem.c +ramstage-y += ../common/cbmem.c ramstage-y += timer.c ramstage-y += i2c.c ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c ramstage-y += clock.c -ramstage-y += spi.c +ramstage-y += ../common/spi.c ramstage-y += sdram.c ramstage-y += gpio.c -ramstage-y += rk808.c +ramstage-y += ../common/rk808.c ramstage-y += pwm.c ramstage-y += vop.c ramstage-y += edp.c ramstage-y += hdmi.c ramstage-y += display.c -ramstage-$(CONFIG_DRIVERS_UART) += uart.c +ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c -CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include/ +CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include +CPPFLAGS_common += -Isrc/soc/rockchip/common/include $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin @printf "Generating: $(subst $(obj)/,,$(@))\n" -- cgit v1.2.3