From 5c2988c4616d8326f56037e7ef5e8280c134ef7d Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Wed, 24 Sep 2014 09:39:16 -0700 Subject: veyron: select rw romstage using vboot2 this change makes veyron pinky to select a rw romstage using vboot2. BUG=None TEST=Booted Veyron Pinky. Verified firmware selection in the log. BRANCH=None Signed-off-by: Daisuke Nojiri CQ-DEPEND=CL:219100 Original-Change-Id: Ia1cfdacde9f8b17b00e7772a02e0d266afedb82f Original-Reviewed-on: https://chromium-review.googlesource.com/219103 Original-Reviewed-by: Daisuke Nojiri Original-Tested-by: Daisuke Nojiri Original-Commit-Queue: Daisuke Nojiri (cherry picked from commit 69c1e4b9ee200645d38d28165389aa85ef9b36cd) Signed-off-by: Aaron Durbin Change-Id: I7b4a2db8bcb95038dfb55bb7ceee66ac4a6c9475 Reviewed-on: http://review.coreboot.org/9234 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/rockchip/rk3288/Makefile.inc | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/soc/rockchip/rk3288/Makefile.inc') diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index f9aa3775b8..095c5555e9 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -29,6 +29,16 @@ bootblock-y += monotonic_timer.c bootblock-y += clock.c bootblock-y += spi.c bootblock-y += media.c +bootblock-y += gpio.c + +verstage-y += monotonic_timer.c +verstage-y += spi.c +verstage-y += timer.c +verstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c +verstage-y += gpio.c +verstage-y += clock.c +verstage-y += i2c.c +verstage-y += media.c romstage-y += cbmem.c romstage-y += timer.c -- cgit v1.2.3