From 739df1b2c2e334dfd03b81393cf1e95f0cb98607 Mon Sep 17 00:00:00 2001 From: huang lin Date: Wed, 27 Aug 2014 17:07:42 +0800 Subject: rk3288: update romstage & mainboard BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: I877b4bf741f45f6cfd032ad5018a60e8a1453622 Signed-off-by: Patrick Georgi Original-Commit-Id: 640da5ad5597803c62d9374a1a48832003077723 Original-Change-Id: I805d93e94f73418099f47d235ca920a91b4b2bfb Original-Signed-off-by: Jeffy Chen Original-Signed-off-by: huang lin Original-Reviewed-on: https://chromium-review.googlesource.com/209469 Original-Reviewed-by: Julius Werner Original-Tested-by: Julius Werner Reviewed-on: http://review.coreboot.org/8867 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/rockchip/rk3288/Makefile.inc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/soc/rockchip/rk3288/Makefile.inc') diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index 1a438e8e3c..8453757983 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -21,14 +21,14 @@ IDBTOOL = util/rockchip/make_idb.py #bootblock-y += bootblock.c bootblock-y += cbmem.c -bootblock-y += timer.c -bootblock-y += monotonic_timer.c -bootblock-y += media.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-$(CONFIG_DRIVERS_UART) += uart.c endif +bootblock-y += timer.c +bootblock-y += monotonic_timer.c bootblock-y += clock.c bootblock-y += spi.c +bootblock-y += media.c romstage-y += cbmem.c romstage-y += timer.c -- cgit v1.2.3