From 82ba4d092b729d0063a22d445f315d08ad7a3e07 Mon Sep 17 00:00:00 2001 From: huang lin Date: Sat, 16 Aug 2014 10:49:32 +0800 Subject: rk3288: add cpu and chip BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: I4c1864171e56a81e8eda95a15ca6a6bc1adc7a70 Signed-off-by: Patrick Georgi Original-Commit-Id: 814af4b653432295cb6d7222af4a6e5a8d9dfbf6 Original-Change-Id: I1a986fbc8b3737bae655207dd89865dd39aecf87 Original-Signed-off-by: Jeffy Chen Original-Reviewed-on: https://chromium-review.googlesource.com/209467 Original-Reviewed-by: David Hendricks Original-Reviewed-by: Julius Werner Original-Commit-Queue: Lin Huang Original-Tested-by: Lin Huang Reviewed-on: http://review.coreboot.org/8866 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/soc/rockchip/rk3288/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/rockchip/rk3288/Makefile.inc') diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index 446aa7842d..1a438e8e3c 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -41,6 +41,7 @@ romstage-y += spi.c romstage-y += media.c romstage-y += sdram.c +ramstage-y += soc.c ramstage-y += cbmem.c ramstage-y += timer.c ramstage-y += monotonic_timer.c -- cgit v1.2.3