From 538b9ef66fc1e24274ae4da2fe9f45531e53a370 Mon Sep 17 00:00:00 2001 From: Lin Huang Date: Wed, 1 Nov 2017 10:22:49 +0800 Subject: rockchip/rk3399: improve mipi transfer flow check GEN_CMD_FULL status before transfer, check GEN_CMD_EMPTY and GEN_PLD_W_EMPTY status after transfer. Change-Id: I936c0d888b10f13141519f95ac7bcae3e15e95d9 Signed-off-by: Lin Huang Reviewed-on: https://review.coreboot.org/22469 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/rockchip/rk3399/include/soc/mipi.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'src/soc/rockchip/rk3399/include') diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h index 077e05ef42..2ecd0ee19d 100644 --- a/src/soc/rockchip/rk3399/include/soc/mipi.h +++ b/src/soc/rockchip/rk3399/include/soc/mipi.h @@ -244,6 +244,17 @@ check_member(rk_mipi_regs, dsi_int_msk1, 0xc8); #define AFE_BIAS_BANDGAP_ANALOG_PROGRAMMABILITY 0x22 #define HS_RX_CONTROL_OF_LANE_0 0x44 +#define GEN_CMD_EMPTY BIT(0) +#define GEN_CMD_FULL BIT(1) +#define GEN_PLD_W_EMPTY BIT(2) +#define GEN_PLD_W_FULL BIT(3) +#define GEN_PLD_R_EMPTY BIT(4) +#define GEN_PLD_R_FULL BIT(5) +#define GEN_RD_CMD_BUSY BIT(6) + +#define MIPI_DSI_DCS_SHORT_WRITE 0x05 +#define MIPI_DSI_DCS_LONG_WRITE 0x39 + enum mipi_dsi_pixel_format { MIPI_DSI_FMT_RGB888, MIPI_DSI_FMT_RGB666, -- cgit v1.2.3