From 55b46454bc324ffe622419a9ef87cab076d65d1a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Thu, 19 Apr 2018 16:23:54 +0200 Subject: src/sifive: Add the SiFive Freedom Unleashed 540 SoC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The FU540 is the first RISC-V SoC with the necessary resources to run Linux (an external memory interface, MMU, etc). More information is available on SiFive's website: https://www.sifive.com/products/hifive-unleashed/ Change-Id: Ic2a3c7b1dfa56b67cc0571969cc9cf67a770ae43 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/25789 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/soc/sifive/fu540/Kconfig | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 src/soc/sifive/fu540/Kconfig (limited to 'src/soc/sifive/fu540/Kconfig') diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig new file mode 100644 index 0000000000..d247c280b5 --- /dev/null +++ b/src/soc/sifive/fu540/Kconfig @@ -0,0 +1,26 @@ +# This file is part of the coreboot project. +# +# Copyright (C) 2018 Jonathan Neuschäfer +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +config SOC_SIFIVE_FU540 + bool + select ARCH_RISCV + select ARCH_BOOTBLOCK_RISCV + select ARCH_VERSTAGE_RISCV + select ARCH_ROMSTAGE_RISCV + select ARCH_RAMSTAGE_RISCV + select BOOTBLOCK_CONSOLE + select DRIVERS_UART_SIFIVE + +if SOC_SIFIVE_FU540 + +endif -- cgit v1.2.3