From 199b75f58a0ffc2ad0871eb4853ca425c78b4893 Mon Sep 17 00:00:00 2001 From: Philipp Hug Date: Thu, 13 Sep 2018 18:11:56 +0200 Subject: arch/riscv: provide a monotonic timer The RISC-V Privileged Architecture specification defines the Machine Time Registers (mtime and mtimecmp) in section 3.1.15. Makes it possible to use the generic udelay. The timer is enabled using RISCV_USE_ARCH_TIMER for the lowrisc, sifive and ucb soc. Change-Id: I5139601226e6f89da69e302a10f2fb56b4b24f38 Signed-off-by: Philipp Hug Reviewed-on: https://review.coreboot.org/27434 Reviewed-by: Ronald G. Minnich Tested-by: build bot (Jenkins) --- src/soc/ucb/riscv/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/ucb') diff --git a/src/soc/ucb/riscv/Kconfig b/src/soc/ucb/riscv/Kconfig index 2a73f5c284..26adb56bfe 100644 --- a/src/soc/ucb/riscv/Kconfig +++ b/src/soc/ucb/riscv/Kconfig @@ -5,6 +5,9 @@ config SOC_UCB_RISCV select ARCH_ROMSTAGE_RISCV select ARCH_RAMSTAGE_RISCV select BOOTBLOCK_CONSOLE + select GENERIC_UDELAY + select HAVE_MONOTONIC_TIMER + select RISCV_USE_ARCH_TIMER bool default n -- cgit v1.2.3