From 11c6b8b53182c5c83095136712f3d38eb5c1dd6a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Wed, 10 Feb 2021 19:22:31 +0200
Subject: nb,soc/intel: Switch to CHROMEOS_RAMOOPS_DYNAMIC
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Change-Id: I4ec59cea256a39a94b05cdeb8f914830ac0bd3f7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/soc/intel/baytrail/Kconfig        | 3 +++
 src/soc/intel/baytrail/northcluster.c | 4 ----
 src/soc/intel/braswell/Kconfig        | 3 +++
 src/soc/intel/braswell/northcluster.c | 4 ----
 4 files changed, 6 insertions(+), 8 deletions(-)

(limited to 'src/soc')

diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 8811b38cf9..f539be88fe 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -37,6 +37,9 @@ config CPU_SPECIFIC_OPTIONS
 	select CPU_INTEL_COMMON
 	select CPU_HAS_L2_ENABLE_MSR
 
+config CHROMEOS
+	select CHROMEOS_RAMOOPS_DYNAMIC
+
 config VBOOT
 	select VBOOT_MUST_REQUEST_DISPLAY
 	select VBOOT_STARTS_IN_ROMSTAGE
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index f4cbc940d6..e8f97681a4 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -10,7 +10,6 @@
 #include <soc/iosf.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
-#include <vendorcode/google/chromeos/chromeos.h>
 
 /*
  * Host Memory Map:
@@ -119,9 +118,6 @@ static void nc_read_resources(struct device *dev)
 	 */
 	mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10);
 	reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10);
-
-	if (CONFIG(CHROMEOS_RAMOOPS))
-		chromeos_reserve_ram_oops(dev, index++);
 }
 
 static void nc_generate_ssdt(const struct device *dev)
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 0e1b6db34f..720597c59a 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -52,6 +52,9 @@ config DCACHE_BSP_STACK_SIZE
 	  The amount of anticipated stack usage in CAR by bootblock and
 	  other stages.
 
+config CHROMEOS
+	select CHROMEOS_RAMOOPS_DYNAMIC
+
 config VBOOT
 	select VBOOT_MUST_REQUEST_DISPLAY
 	select VBOOT_STARTS_IN_ROMSTAGE
diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index 339e2933dc..b7ddee42b2 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -13,7 +13,6 @@
 #include <soc/iosf.h>
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
-#include <vendorcode/google/chromeos/chromeos.h>
 #include <stddef.h>
 
 /*
@@ -145,9 +144,6 @@ static void nc_read_resources(struct device *dev)
 	base_k = RES_IN_KiB(LAPIC_DEFAULT_BASE);
 	size_k = RES_IN_KiB(0x00100000);
 	mmio_resource(dev, index++, base_k, size_k);
-
-	if (CONFIG(CHROMEOS_RAMOOPS))
-		chromeos_reserve_ram_oops(dev, index++);
 }
 
 static void nc_generate_ssdt(const struct device *dev)
-- 
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