From 320647abdad1ea6cdceb834933507677020ea388 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Thu, 19 Jun 2014 19:09:47 -0700 Subject: vboot2: add verstage Verstage will host vboot2 for firmware verification. It's a stage in the sense that it has its own set of toolchains, compiler flags, and includes. This allows us to easily add object files as needed. But it's directly linked to bootblock. This allows us to avoid code duplication for stage loading and jumping (e.g. cbfs driver) for the boards where bootblock has to run in a different architecture (e.g. Tegra124). To avoid name space conflict, verstage symbols are prefixed with verstage_. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Original-Signed-off-by: Daisuke Nojiri Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac Original-Reviewed-on: https://chromium-review.googlesource.com/204376 Original-Reviewed-by: Randall Spangler (cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3) Signed-off-by: Marc Jones Change-Id: I42b2b3854a24ef6cda2316eb741ca379f41516e0 Reviewed-on: http://review.coreboot.org/8159 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/soc/nvidia/tegra124/Kconfig | 1 + src/soc/nvidia/tegra124/Makefile.inc | 2 ++ src/soc/nvidia/tegra124/bootblock.c | 9 ++++++++- src/soc/nvidia/tegra124/verstage.c | 9 +++++++++ src/soc/nvidia/tegra124/verstage.h | 2 ++ 5 files changed, 22 insertions(+), 1 deletion(-) create mode 100644 src/soc/nvidia/tegra124/verstage.c create mode 100644 src/soc/nvidia/tegra124/verstage.h (limited to 'src/soc') diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index 195261e2e4..ea946e6583 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -2,6 +2,7 @@ config SOC_NVIDIA_TEGRA124 bool default n select ARCH_BOOTBLOCK_ARMV4 + select ARCH_VERSTAGE_ARMV7 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 select HAVE_UART_SPECIAL diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc index 792bb9992b..b306412956 100644 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ b/src/soc/nvidia/tegra124/Makefile.inc @@ -20,6 +20,8 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c endif +verstage-y += verstage.c + romstage-y += cbfs.c romstage-y += cbmem.c romstage-y += clock.c diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c index 2857a90ace..0456b488c9 100644 --- a/src/soc/nvidia/tegra124/bootblock.c +++ b/src/soc/nvidia/tegra124/bootblock.c @@ -23,10 +23,13 @@ #include #include #include - #include "pinmux.h" #include "power.h" +#if CONFIG_VBOOT2_VERIFY_FIRMWARE +#include "verstage.h" +#endif + void main(void) { void *entry; @@ -72,7 +75,11 @@ void main(void) power_enable_cpu_rail(); power_ungate_cpu(); +#if CONFIG_VBOOT2_VERIFY_FIRMWARE + entry = (void *)verstage_vboot_main; +#else entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage"); +#endif if (entry) clock_cpu0_config_and_reset(entry); diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c new file mode 100644 index 0000000000..234a89d0b2 --- /dev/null +++ b/src/soc/nvidia/tegra124/verstage.c @@ -0,0 +1,9 @@ +#include "verstage.h" + +/** + * Stage entry point + */ +void vboot_main(void) +{ + for(;;); +} diff --git a/src/soc/nvidia/tegra124/verstage.h b/src/soc/nvidia/tegra124/verstage.h new file mode 100644 index 0000000000..a0bac347c6 --- /dev/null +++ b/src/soc/nvidia/tegra124/verstage.h @@ -0,0 +1,2 @@ +void vboot_main(void); +void verstage_vboot_main(void); -- cgit v1.2.3