From 69c57e19da3d940b34e8dd3e5ca7eb32e79e391e Mon Sep 17 00:00:00 2001 From: Julien Viard de Galbert Date: Wed, 7 Mar 2018 14:19:03 +0100 Subject: soc/intel/denverton_ns: Enable MC Exception Change-Id: I9773c61d06bb6c68612e498a35b5ad22cd5a8a6e Signed-off-by: Julien Viard de Galbert Reviewed-on: https://review.coreboot.org/c/coreboot/+/25434 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/denverton_ns/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 7cee5be39d..1fd233a23a 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -44,6 +45,12 @@ static void dnv_configure_mca(void) of these banks are core vs package scope. For now every CPU clears every bank. */ mca_configure(); + + /* TODO install a fallback MC handler for each core in case OS does + not provide one. Is it really needed? */ + + /* Enable the machine check exception */ + write_cr4(read_cr4() | CR4_MCE); } static void denverton_core_init(struct device *cpu) -- cgit v1.2.3