From 8079c5c1c2b76ebd01cfcddcef4b5398ee860403 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 8 Jul 2020 08:18:16 -0600 Subject: soc/amd/picasso: Add controls for SMT and downcoring BUG=b:159198385 TEST=confirm both using Mandolin Signed-off-by: Marshall Dawson Change-Id: I91654817608ab62e4104959b8876333911b90175 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43299 Reviewed-by: Felix Held Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/chip.h | 8 ++++++++ src/soc/amd/picasso/romstage.c | 3 +++ 2 files changed, 11 insertions(+) (limited to 'src/soc') diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 62272c0927..b641379605 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -93,6 +93,14 @@ struct soc_amd_picasso_config { /* PROCHOT_L de-assertion Ramp Time */ uint32_t prochot_l_deassertion_ramp_time; + enum { + DOWNCORE_AUTO = 0, + DOWNCORE_1 = 1, /* Run with single core */ + DOWNCORE_2 = 3, /* Run with two cores */ + DOWNCORE_3 = 4, /* Run with three cores */ + } downcore_mode; + uint8_t smt_disable; /* 1=disable SMT, 0=enable SMT */ + /* Lower die temperature limit */ uint32_t thermctl_limit; diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 372c6b5b18..e7b4b3de99 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -43,6 +43,9 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mcfg->stapm_time_constant = config->stapm_time_constant; } + mcfg->ccx_down_core_mode = config->downcore_mode; + mcfg->ccx_disable_smt = config->smt_disable; + mcfg->sustained_power_limit = config->sustained_power_limit; mcfg->prochot_l_deassertion_ramp_time = config->prochot_l_deassertion_ramp_time; mcfg->thermctl_limit = config->thermctl_limit; -- cgit v1.2.3