From d60089b7b1f32271da109997c53f85dab6c03afd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sat, 26 Oct 2019 10:44:33 +0200 Subject: soc/intel/skylake: set FSP param to enable or skip GOP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the FSP parameter PeiGraphicsPeimInit according to RUN_FSP_GOP to enable or skip GOP. Change-Id: I5731003c8a094c4d108efbea14d31d335758bbb7 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36350 Reviewed-by: Patrick Georgi Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/chip.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index c4f4e50cd2..7987f46954 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -509,6 +509,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchIoApicFunctionNumber = V_P2SB_IBDF_FUN; } + dev = pcidev_path_on_root(SA_DEVFN_IGD); + if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) + params->PeiGraphicsPeimInit = 1; + else + params->PeiGraphicsPeimInit = 0; + soc_irq_settings(params); } -- cgit v1.2.3