From e7a336ac29b1ef5aaa1b0aa4926ed75829b491b1 Mon Sep 17 00:00:00 2001 From: Ionela Voinescu Date: Fri, 24 Jul 2015 15:00:20 +0100 Subject: mips: add coherency argument to identity mapping In order for a U-boot payload to work properly the soc_registers region (device registers) needs to be mapped as uncached. Therefore, add a coherency argument to the identity mapping funcion which will establish the type of mapping. Change-Id: I26fc546378acda4f4f8f4757fbc0adb03ac7db9f Signed-off-by: Ionela Voinescu Reviewed-on: https://review.coreboot.org/12769 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/imgtec/pistachio/bootblock.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/soc') diff --git a/src/soc/imgtec/pistachio/bootblock.c b/src/soc/imgtec/pistachio/bootblock.c index 5d38278942..eceb814447 100644 --- a/src/soc/imgtec/pistachio/bootblock.c +++ b/src/soc/imgtec/pistachio/bootblock.c @@ -54,7 +54,7 @@ static void bootblock_mmu_init(void) dram_base += null_guard_size; dram_size -= null_guard_size; } - - assert(!identity_map(dram_base, dram_size)); - assert(!identity_map((uint32_t)_sram, _sram_size)); + assert(!identity_map((uint32_t)_sram, _sram_size, + C0_ENTRYLO_COHERENCY_WB)); + assert(!identity_map(dram_base, dram_size, C0_ENTRYLO_COHERENCY_WB)); } -- cgit v1.2.3