From f5cf60f25b8c77e0c90094e3326c5bc0e37cb383 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Mon, 18 Mar 2019 15:26:48 +0200
Subject: Move calls to quick_ram_check() before CBMEM init
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After raminit completes, do a read-modify-write test
just below CBMEM top address. If test fails, die().

Change-Id: I33d4153a5ce0908b8889517394afb46f1ca28f92
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31978
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
---
 src/soc/intel/broadwell/romstage/raminit.c         | 4 ----
 src/soc/intel/fsp_baytrail/romstage/romstage.c     | 7 -------
 src/soc/intel/fsp_broadwell_de/romstage/romstage.c | 4 ----
 3 files changed, 15 deletions(-)

(limited to 'src/soc')

diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index 04657aebd8..8d43907f8a 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -20,7 +20,6 @@
 #include <cf9_reset.h>
 #include <console/console.h>
 #include <device/pci_def.h>
-#include <lib.h>
 #include <memory_info.h>
 #include <mrc_cache.h>
 #include <string.h>
@@ -98,9 +97,6 @@ void raminit(struct pei_data *pei_data)
 
 	report_memory_config();
 
-	/* Basic memory sanity test */
-	quick_ram_check();
-
 	if (pei_data->boot_mode != ACPI_S3) {
 		cbmem_initialize_empty();
 	} else if (cbmem_initialize()) {
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index b4eb006aab..c46b09ef97 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -15,7 +15,6 @@
  */
 
 #include <stddef.h>
-#include <lib.h>
 #include <arch/io.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
@@ -245,12 +244,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
 	late_mainboard_romstage_entry();
 	post_code(0x4c);
 
-	/* if S3 resume skip RAM check */
-	if (prev_sleep_state != ACPI_S3) {
-		quick_ram_check();
-		post_code(0x4d);
-	}
-
 	cbmem_was_initted = !cbmem_recovery(prev_sleep_state == ACPI_S3);
 
 	/* Save the HOB pointer in CBMEM to be used in ramstage*/
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 36e9e6b1db..a75dabd225 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -16,7 +16,6 @@
  */
 
 #include <stddef.h>
-#include <lib.h>
 #include <device/pci_ops.h>
 #include <arch/cbfs.h>
 #include <cbmem.h>
@@ -112,9 +111,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
 	post_code(0x4b);
 	late_mainboard_romstage_entry();
 
-	post_code(0x4c);
-	quick_ram_check();
-
 	post_code(0x4d);
 	cbmem_was_initted = !cbmem_recovery(0);
 
-- 
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