From 287ce5f1ee8c3765d05bfbc0a6dd5ea9ec8b5c87 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Sun, 1 Dec 2019 17:41:23 +0100 Subject: sb/amd/{agesa,pi}: use ACPIMMIO common block wherever possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TEST=boot PC Engines apu1 and apu2 and launch Debian Linux Signed-off-by: Michał Żygowski Change-Id: Ic3d5abc8f3b235ea61f66950ada8aff1dc48f8c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37400 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/southbridge/amd/agesa/hudson/early_setup.c | 1 + src/southbridge/amd/agesa/hudson/imc.c | 23 +++++++++++------------ src/southbridge/amd/agesa/hudson/smbus_spd.c | 10 ++-------- 3 files changed, 14 insertions(+), 20 deletions(-) (limited to 'src/southbridge/amd/agesa/hudson') diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c index 639a5e8764..090a85288b 100644 --- a/src/southbridge/amd/agesa/hudson/early_setup.c +++ b/src/southbridge/amd/agesa/hudson/early_setup.c @@ -17,6 +17,7 @@ #define _HUDSON_EARLY_SETUP_C_ #include +#include #include #include #include diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c index 1d63c1e36a..934d1e95da 100644 --- a/src/southbridge/amd/agesa/hudson/imc.c +++ b/src/southbridge/amd/agesa/hudson/imc.c @@ -14,6 +14,7 @@ */ #include "imc.h" +#include #include #include #include @@ -22,24 +23,22 @@ #include #include -#define VACPI_MMIO_VBASE ((u8 *)ACPI_MMIO_BASE) - void imc_reg_init(void) { /* Init Power Management Block 2 (PM2) Registers. * Check BKDG for AMD Family 16h for details. */ - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x00, 0x06); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x01, 0x06); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x02, 0xf7); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x03, 0xff); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x04, 0xff); + pm2_write8(0, 0x06); + pm2_write8(1, 0x06); + pm2_write8(2, 0xf7); + pm2_write8(3, 0xff); + pm2_write8(4, 0xff); #if !CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x10, 0x06); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x11, 0x06); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x12, 0xf7); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x13, 0xff); - write8(VACPI_MMIO_VBASE + PMIO2_BASE + 0x14, 0xff); + pm2_write8(0x10, 0x06); + pm2_write8(0x11, 0x06); + pm2_write8(0x12, 0xf7); + pm2_write8(0x13, 0xff); + pm2_write8(0x14, 0xff); #endif #if CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) diff --git a/src/southbridge/amd/agesa/hudson/smbus_spd.c b/src/southbridge/amd/agesa/hudson/smbus_spd.c index 8eb36f46ee..9ddae38c5b 100644 --- a/src/southbridge/amd/agesa/hudson/smbus_spd.c +++ b/src/southbridge/amd/agesa/hudson/smbus_spd.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -126,16 +127,9 @@ static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count) return 0; } -static void writePmReg (int reg, int data) -{ - __outbyte (0xCD6, reg); - __outbyte (0xCD7, data); -} - static void setupFch (int ioBase) { - writePmReg (0x2D, ioBase >> 8); - writePmReg (0x2C, ioBase | 1); + pm_write16(0x2c, ioBase | 1); __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz } -- cgit v1.2.3