From 4086d16ba216955d6124d99c9aae7ceeb2457a71 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Thu, 17 Jul 2003 03:26:03 +0000 Subject: - Implement an enable method for pci devices. - Add initial support for the amd8131 - Update the mptable to something possible - hdama/Config add the amd8131 southbridge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/amd8131/amd8131_bridge.c | 54 ++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 src/southbridge/amd/amd8131/amd8131_bridge.c (limited to 'src/southbridge/amd/amd8131') diff --git a/src/southbridge/amd/amd8131/amd8131_bridge.c b/src/southbridge/amd/amd8131/amd8131_bridge.c new file mode 100644 index 0000000000..9ef83da50d --- /dev/null +++ b/src/southbridge/amd/amd8131/amd8131_bridge.c @@ -0,0 +1,54 @@ +/* + * (C) 2003 Linux Networx + */ +#include +#include +#include +#include +#include + +static void pcix_init(device_t dev) +{ + return; +} + +static struct device_operations pcix_ops = { + .read_resources = pci_bus_read_resources, + .set_resources = pci_dev_set_resources, + .init = pcix_init, + .scan_bus = pci_scan_bridge, +}; + +static struct pci_driver pcix_driver __pci_driver = { + .ops = &pcix_ops, + .vendor = PCI_VENDOR_ID_AMD, + .device = 0x7450, +}; + + +static void ioapic_enable(device_t dev) +{ + uint32_t value; + value = pci_read_config32(dev, 0x44); + if (dev->enable) { + value |= ((1 << 1) | (1 << 0)); + } else { + value &= ~((1 << 1) | (1 << 0)); + } + pci_write_config32(dev, 0x44, value); +} + +static struct device_operations ioapic_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .init = 0, + .scan_bus = 0, + .enable = ioapic_enable, +}; + +static struct pci_driver ioapic_driver __pci_driver = { + .ops = &ioapic_ops, + .vendor = PCI_VENDOR_ID_AMD, + .device = 0x7451, + +}; -- cgit v1.2.3