From 41cd047cd25b5fbb02da3e37b9dc2ca6ca90e34e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 7 Feb 2015 11:20:54 +0200 Subject: AMD cimx/sb800: Move cimx init for ramstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This has nothing to do with SATA controller. We only need to fill the table with defaults before we parse devicetree for changes to device configuration. Change-Id: Ic4b28b5992ec9bfdf252f61b1c86b0162243cc95 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8386 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Felix Held Reviewed-by: Dave Frodin Reviewed-by: Alexandru Gagniuc --- src/southbridge/amd/cimx/sb800/cfg.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/southbridge/amd/cimx/sb800/cfg.c') diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index ac6e6aeb81..c6142409f1 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -132,11 +132,4 @@ void sb800_cimx_config(AMDSBCFG *sb_config) sb_config->GppPhyPllPowerDown = TRUE; //GPP power saving sb_config->SBGecPwr = 0x03;//11b << 5, rpr BDF: 00:20:06 sb_config->GecConfig = GEC_CONFIG; - -#ifndef __PRE_RAM__ - /* ramstage cimx config here */ - if (!sb_config->StdHeader.CALLBACK.CalloutPtr) { - sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry; - } -#endif //!__PRE_RAM__ } -- cgit v1.2.3