From 287ce5f1ee8c3765d05bfbc0a6dd5ea9ec8b5c87 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Sun, 1 Dec 2019 17:41:23 +0100 Subject: sb/amd/{agesa,pi}: use ACPIMMIO common block wherever possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TEST=boot PC Engines apu1 and apu2 and launch Debian Linux Signed-off-by: Michał Żygowski Change-Id: Ic3d5abc8f3b235ea61f66950ada8aff1dc48f8c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37400 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/southbridge/amd/cimx/sb800/early.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src/southbridge/amd/cimx/sb800/early.c') diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c index 48829578e1..2ee4d40230 100644 --- a/src/southbridge/amd/cimx/sb800/early.c +++ b/src/southbridge/amd/cimx/sb800/early.c @@ -14,6 +14,7 @@ */ #include +#include #include "SBPLATFORM.h" #include "sb_cimx.h" #include "cfg.h" /*sb800_cimx_config*/ @@ -41,9 +42,7 @@ void sb_Poweron_Init(void) */ void sb800_clk_output_48Mhz(void) { - /* AcpiMMioDecodeEn */ - RWPMIO(SB_PMIOA_REG24, AccWidthUint8, ~(BIT0 + BIT1), BIT0); - *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */ - *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) |= 1 << 1; /* 48Mhz */ + misc_write32(0x40, misc_read32(0x40) & (~5)); + misc_write32(0x40, misc_read32(0x40) | 2); } -- cgit v1.2.3