From 78c5d584a087265e44b076647db19efd4db4a7bb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Fri, 9 Jan 2015 23:48:47 +0200
Subject: ACPI: Add acpi_is_wakeup_s3() for romstage
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This replaces acpi_is_wakeup_early().

Change-Id: I23112c1fc7b6f99584bc065fbf6b10fb073b1eb6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8187
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
---
 src/southbridge/amd/cimx/sb800/early.c | 8 --------
 1 file changed, 8 deletions(-)

(limited to 'src/southbridge/amd/cimx/sb800/early.c')

diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 7492f9942d..34375c59e4 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -20,7 +20,6 @@
 #include <stdint.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>		/* inl, outl */
-#include <arch/acpi.h>
 #include "SBPLATFORM.h"
 #include "sb_cimx.h"
 #include "cfg.h"		/*sb800_cimx_config*/
@@ -74,10 +73,3 @@ void sb800_clk_output_48Mhz(void)
         *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
         *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) |= 1 << 1; /* 48Mhz */
 }
-
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_is_wakeup_early(void)
-{
-	return (acpi_get_sleep_type() == 3);
-}
-#endif
-- 
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