From 1bcd7fcb6199528fc82685e161d6b39f273a1962 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 28 Jul 2016 21:20:04 +0200 Subject: src/southbridge: Capitalize CPU, RAM and ROM Change-Id: I01413b9f8b77ecdcb781340f04c2fe9e24810264 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/15941 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Reviewed-by: Tobias Diedrich --- src/southbridge/amd/cs5535/chipsetinit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/southbridge/amd/cs5535') diff --git a/src/southbridge/amd/cs5535/chipsetinit.c b/src/southbridge/amd/cs5535/chipsetinit.c index ab1b640a44..05fb6eb1da 100644 --- a/src/southbridge/amd/cs5535/chipsetinit.c +++ b/src/southbridge/amd/cs5535/chipsetinit.c @@ -310,7 +310,7 @@ chipsetinit(void) outl (GPIOL_2_SET, GPIOL_IN_AUX1_SELECT); /* Allow IO read and writes during a ATA DMA operation. */ - /* This could be done in the HD rom but do it here for easier debugging. */ + /* This could be done in the HD ROM but do it here for easier debugging. */ msrnum = ATA_SB_GLD_MSR_ERR; msr = rdmsr(msrnum); -- cgit v1.2.3