From 1656c18d76773afe2b48dd8bf29d8f4e0b40d6ba Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Fri, 5 May 2006 03:54:31 +0000 Subject: reorder early startup so that it might work. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2298 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/cs5536/cs5536_early_setup.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'src/southbridge/amd/cs5536/cs5536_early_setup.c') diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index bf77087a47..710adccf7c 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -232,6 +232,10 @@ static int cs5536_setup_onchipuart(void) wrmsr(MDD_LEG_IO,msr); } +/* note: you can't do prints in here in most cases, + * and we don't want to hang on serial, so they are + * commented out + */ static int cs5536_early_setup(void) { msr_t msr; @@ -241,19 +245,19 @@ static int cs5536_early_setup(void) msr = rdmsr(GLCP_SYS_RSTPLL); if (msr.lo & (0x3f << 26)) { /* PLL is already set and we are reboot from PLL reset */ - print_debug("reboot from BIOS reset\n\r"); + //print_debug("reboot from BIOS reset\n\r"); return; } - print_debug("Setup idsel\r\n"); + //print_debug("Setup idsel\r\n"); cs5536_setup_idsel(); - print_debug("Setup iobase\r\n"); + //print_debug("Setup iobase\r\n"); cs5536_usb_swapsif(); cs5536_setup_iobase(); - print_debug("Setup gpio\r\n"); + //print_debug("Setup gpio\r\n"); cs5536_setup_gpio(); - print_debug("Setup cis_mode\r\n"); + //print_debug("Setup cis_mode\r\n"); cs5536_setup_cis_mode(); - print_debug("Setup smbus\r\n"); + //print_debug("Setup smbus\r\n"); cs5536_enable_smbus(); dummy(); } -- cgit v1.2.3