From 5a559d4386b4f659bfeddffa8f38670e24a35ac0 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 3 Feb 2010 13:49:24 +0000 Subject: The UART2 on the AMD cs5536 is incorrectly configured in two places. GPIO lines 4 and 3 are swapped and also incorrectly put in IR mode receive (compound fault). Signed-off-by: Stefan Reinauer Acked-by: Edwin Beasant git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5074 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/cs5536/cs5536_early_setup.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/amd/cs5536/cs5536_early_setup.c') diff --git a/src/southbridge/amd/cs5536/cs5536_early_setup.c b/src/southbridge/amd/cs5536/cs5536_early_setup.c index d16bac9208..7c67d1f042 100644 --- a/src/southbridge/amd/cs5536/cs5536_early_setup.c +++ b/src/southbridge/amd/cs5536/cs5536_early_setup.c @@ -172,6 +172,7 @@ static void cs5536_setup_onchipuart(void) outl(GPIOL_8_SET, GPIO_IO_BASE + GPIOL_OUTPUT_ENABLE); /* Set: OUTAUX1 Select (0x10) */ outl(GPIOL_8_SET, GPIO_IO_BASE + GPIOL_OUT_AUX1_SELECT); + /* GPIO9 - UART1_RX */ /* Set: Input Enable (0x20) */ outl(GPIOL_9_SET, GPIO_IO_BASE + GPIOL_INPUT_ENABLE); -- cgit v1.2.3