From c02b4fc9db3c3c1e263027382697b566127f66bb Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 22 Mar 2010 11:42:32 +0000 Subject: printk_foo -> printk(BIOS_FOO, ...) Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/sb700/sb700.c | 4 ++-- src/southbridge/amd/sb700/sb700_early_setup.c | 18 +++++++-------- src/southbridge/amd/sb700/sb700_hda.c | 8 +++---- src/southbridge/amd/sb700/sb700_lpc.c | 3 +-- src/southbridge/amd/sb700/sb700_sata.c | 32 +++++++++++++-------------- src/southbridge/amd/sb700/sb700_sm.c | 10 ++++----- src/southbridge/amd/sb700/sb700_smbus.c | 2 +- src/southbridge/amd/sb700/sb700_usb.c | 4 ++-- 8 files changed, 40 insertions(+), 41 deletions(-) (limited to 'src/southbridge/amd/sb700') diff --git a/src/southbridge/amd/sb700/sb700.c b/src/southbridge/amd/sb700/sb700.c index 4bbde6dba2..39ae3a6b34 100644 --- a/src/southbridge/amd/sb700/sb700.c +++ b/src/southbridge/amd/sb700/sb700.c @@ -118,7 +118,7 @@ void sb700_enable(device_t dev) u32 devfn; - printk_debug("sb700_enable()\n"); + printk(BIOS_DEBUG, "sb700_enable()\n"); /* * 0:11.0 SATA bit 8 of sm_dev 0xac : 1 - enable, default + 32 * 3 @@ -221,7 +221,7 @@ void sb700_enable(device_t dev) index = 4; break; default: - printk_debug("unknown dev: %s deviceid=%4x\n", dev_path(dev), + printk(BIOS_DEBUG, "unknown dev: %s deviceid=%4x\n", dev_path(dev), deviceid); } } diff --git a/src/southbridge/amd/sb700/sb700_early_setup.c b/src/southbridge/amd/sb700/sb700_early_setup.c index a063c70cf9..3777bd6288 100644 --- a/src/southbridge/amd/sb700/sb700_early_setup.c +++ b/src/southbridge/amd/sb700/sb700_early_setup.c @@ -300,16 +300,16 @@ static void sb700_devices_por_init(void) device_t dev; u8 byte; - printk_info("sb700_devices_por_init()\n"); + printk(BIOS_INFO, "sb700_devices_por_init()\n"); /* SMBus Device, BDF:0-20-0 */ - printk_info("sb700_devices_por_init(): SMBus Device, BDF:0-20-0\n"); + printk(BIOS_INFO, "sb700_devices_por_init(): SMBus Device, BDF:0-20-0\n"); dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0); if (dev == PCI_DEV_INVALID) { die("SMBUS controller not found\r\n"); /* NOT REACHED */ } - printk_info("SMBus controller enabled, sb revision is A%x\r\n", + printk(BIOS_INFO, "SMBus controller enabled, sb revision is A%x\r\n", set_sb700_revision()); /* sbPorAtStartOfTblCfg */ @@ -378,7 +378,7 @@ static void sb700_devices_por_init(void) outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); /* IDE Device, BDF:0-20-1 */ - printk_info("sb700_devices_por_init(): IDE Device, BDF:0-20-1\n"); + printk(BIOS_INFO, "sb700_devices_por_init(): IDE Device, BDF:0-20-1\n"); dev = pci_locate_device(PCI_ID(0x1002, 0x439C), 0); /* Disable prefetch */ byte = pci_read_config8(dev, 0x63); @@ -386,7 +386,7 @@ static void sb700_devices_por_init(void) pci_write_config8(dev, 0x63, byte); /* LPC Device, BDF:0-20-3 */ - printk_info("sb700_devices_por_init(): LPC Device, BDF:0-20-3\n"); + printk(BIOS_INFO, "sb700_devices_por_init(): LPC Device, BDF:0-20-3\n"); dev = pci_locate_device(PCI_ID(0x1002, 0x439D), 0); /* DMA enable */ pci_write_config8(dev, 0x40, 0x04); @@ -423,7 +423,7 @@ static void sb700_devices_por_init(void) /* P2P Bridge, BDF:0-20-4, the configuration of the registers in this dev are copied from CIM, */ - printk_info("sb700_devices_por_init(): P2P Bridge, BDF:0-20-4\n"); + printk(BIOS_INFO, "sb700_devices_por_init(): P2P Bridge, BDF:0-20-4\n"); dev = pci_locate_device(PCI_ID(0x1002, 0x4384), 0); /* Arbiter enable. */ @@ -440,7 +440,7 @@ static void sb700_devices_por_init(void) pci_write_config8(dev, 0x50, 0x01); /* SATA Device, BDF:0-17-0, Non-Raid-5 SATA controller */ - printk_info("sb700_devices_por_init(): SATA Device, BDF:0-18-0\n"); + printk(BIOS_INFO, "sb700_devices_por_init(): SATA Device, BDF:0-18-0\n"); dev = pci_locate_device(PCI_ID(0x1002, 0x4390), 0); /*PHY Global Control*/ @@ -457,7 +457,7 @@ static void sb700_pmio_por_init(void) { u8 byte; - printk_info("sb700_pmio_por_init()\n"); + printk(BIOS_INFO, "sb700_pmio_por_init()\n"); /* K8KbRstEn, KB_RST# control for K8 system. */ byte = pmio_read(0x66); byte |= 0x20; @@ -602,7 +602,7 @@ static void sb700_before_pci_init(void) */ static void sb700_early_setup(void) { - printk_info("sb700_early_setup()\n"); + printk(BIOS_INFO, "sb700_early_setup()\n"); sb700_por_init(); } diff --git a/src/southbridge/amd/sb700/sb700_hda.c b/src/southbridge/amd/sb700/sb700_hda.c index 2f55c944c7..af1361692a 100644 --- a/src/southbridge/amd/sb700/sb700_hda.c +++ b/src/southbridge/amd/sb700/sb700_hda.c @@ -86,7 +86,7 @@ no_codec: /* Codec Not found */ /* Put HDA back in reset (BAR + 0x8) [0] */ set_bits(base + 0x08, 1, 0); - printk_debug("No codec!\n"); + printk(BIOS_DEBUG, "No codec!\n"); return 0; } @@ -150,7 +150,7 @@ static void codec_init(u32 base, int addr) dword = read32(base + 0x64); /* 2 */ - printk_debug("%x(th) codec viddid: %08x\n", addr, dword); + printk(BIOS_DEBUG, "%x(th) codec viddid: %08x\n", addr, dword); } static void codecs_init(u32 base, u32 codec_mask) @@ -203,11 +203,11 @@ static void hda_init(struct device *dev) return; base = (u32)res->base; - printk_debug("base = 0x%x\n", base); + printk(BIOS_DEBUG, "base = 0x%x\n", base); codec_mask = codec_detect(base); if (codec_mask) { - printk_debug("codec_mask = %02x\n", codec_mask); + printk(BIOS_DEBUG, "codec_mask = %02x\n", codec_mask); codecs_init(base, codec_mask); } } diff --git a/src/southbridge/amd/sb700/sb700_lpc.c b/src/southbridge/amd/sb700/sb700_lpc.c index b6d7818160..3bc160827d 100644 --- a/src/southbridge/amd/sb700/sb700_lpc.c +++ b/src/southbridge/amd/sb700/sb700_lpc.c @@ -143,8 +143,7 @@ static void sb700_lpc_enable_childrens_resources(device_t dev) continue; base = res->base; end = resource_end(res); - printk_debug - ("sb700 lpc decode:%s, base=0x%08x, end=0x%08x\n", + printk(BIOS_DEBUG, "sb700 lpc decode:%s, base=0x%08x, end=0x%08x\n", dev_path(child), base, end); switch (base) { case 0x60: /* KB */ diff --git a/src/southbridge/amd/sb700/sb700_sata.c b/src/southbridge/amd/sb700/sb700_sata.c index cd5084e745..48c192c95d 100644 --- a/src/southbridge/amd/sb700/sb700_sata.c +++ b/src/southbridge/amd/sb700/sb700_sata.c @@ -34,22 +34,22 @@ int sata_drive_detect(int portnum, u16 iobar) while (byte = inb(iobar + 0x6), byte2 = inb(iobar + 0x7), (byte != (0xA0 + 0x10 * (portnum % 2))) || ((byte2 & 0x88) != 0)) { - printk_spew("0x6=%x, 0x7=%x\n", byte, byte2); + printk(BIOS_SPEW, "0x6=%x, 0x7=%x\n", byte, byte2); if (byte != (0xA0 + 0x10 * (portnum % 2))) { /* This will happen at the first iteration of this loop * if the first SATA port is unpopulated and the * second SATA port is poulated. */ - printk_debug("drive no longer selected after %i ms, " + printk(BIOS_DEBUG, "drive no longer selected after %i ms, " "retrying init\n", i * 10); return 1; } else - printk_spew("drive detection not yet completed, " + printk(BIOS_SPEW, "drive detection not yet completed, " "waiting...\n"); mdelay(10); i++; } - printk_spew("drive detection done after %i ms\n", i * 10); + printk(BIOS_SPEW, "drive detection done after %i ms\n", i * 10); return 0; } @@ -96,12 +96,12 @@ static void sata_init(struct device *dev) sata_bar3 = pci_read_config16(dev, 0x1C) & ~0x3; sata_bar4 = pci_read_config16(dev, 0x20) & ~0xf; - printk_spew("sata_bar0=%x\n", sata_bar0); /* 3030 */ - printk_spew("sata_bar1=%x\n", sata_bar1); /* 3070 */ - printk_spew("sata_bar2=%x\n", sata_bar2); /* 3040 */ - printk_spew("sata_bar3=%x\n", sata_bar3); /* 3080 */ - printk_spew("sata_bar4=%x\n", sata_bar4); /* 3000 */ - printk_spew("sata_bar5=%p\n", sata_bar5); /* e0309000 */ + printk(BIOS_SPEW, "sata_bar0=%x\n", sata_bar0); /* 3030 */ + printk(BIOS_SPEW, "sata_bar1=%x\n", sata_bar1); /* 3070 */ + printk(BIOS_SPEW, "sata_bar2=%x\n", sata_bar2); /* 3040 */ + printk(BIOS_SPEW, "sata_bar3=%x\n", sata_bar3); /* 3080 */ + printk(BIOS_SPEW, "sata_bar4=%x\n", sata_bar4); /* 3000 */ + printk(BIOS_SPEW, "sata_bar5=%p\n", sata_bar5); /* e0309000 */ /* disable combined mode */ byte = pci_read_config8(sm_dev, 0xAD); @@ -199,12 +199,12 @@ static void sata_init(struct device *dev) for (i = 0; i < 4; i++) { byte = read8(sata_bar5 + 0x128 + 0x80 * i); - printk_spew("SATA port %i status = %x\n", i, byte); + printk(BIOS_SPEW, "SATA port %i status = %x\n", i, byte); byte &= 0xF; if( byte == 0x1 ) { /* If the drive status is 0x1 then we see it but we aren't talking to it. */ /* Try to do something about it. */ - printk_spew("SATA device detected but not talking. Trying lower speed.\n"); + printk(BIOS_SPEW, "SATA device detected but not talking. Trying lower speed.\n"); /* Read in Port-N Serial ATA Control Register */ byte = read8(sata_bar5 + 0x12C + 0x80 * i); @@ -225,7 +225,7 @@ static void sata_init(struct device *dev) /* Reread status */ byte = read8(sata_bar5 + 0x128 + 0x80 * i); - printk_spew("SATA port %i status = %x\n", i, byte); + printk(BIOS_SPEW, "SATA port %i status = %x\n", i, byte); byte &= 0xF; } @@ -234,13 +234,13 @@ static void sata_init(struct device *dev) if (!sata_drive_detect(i, ((i / 2) == 0) ? sata_bar0 : sata_bar2)) break; } - printk_debug("%s %s device is %sready after %i tries\n", + printk(BIOS_DEBUG, "%s %s device is %sready after %i tries\n", (i / 2) ? "Secondary" : "Primary", (i % 2 ) ? "Slave" : "Master", (j == 10) ? "not " : "", (j == 10) ? j : j + 1); } else { - printk_debug("No %s %s SATA drive on Slot%i\n", + printk(BIOS_DEBUG, "No %s %s SATA drive on Slot%i\n", (i / 2) ? "Secondary" : "Primary", (i % 2 ) ? "Slave" : "Master", i); } @@ -267,7 +267,7 @@ static void sata_init(struct device *dev) /* word = pm_ioread(0x28); */ /* byte = pm_ioread(0x29); */ /* word |= byte<<8; */ - /* printk_debug("AcpiGpe0Blk addr = %x\n", word); */ + /* printk(BIOS_DEBUG, "AcpiGpe0Blk addr = %x\n", word); */ /* write32(word, 0x80000000); */ } diff --git a/src/southbridge/amd/sb700/sb700_sm.c b/src/southbridge/amd/sb700/sb700_sm.c index dbd7a6ab02..d053aff0fd 100644 --- a/src/southbridge/amd/sb700/sb700_sm.c +++ b/src/southbridge/amd/sb700/sb700_sm.c @@ -54,7 +54,7 @@ static void sm_init(device_t dev) u32 on; u32 nmi_option; - printk_info("sm_init().\n"); + printk(BIOS_INFO, "sm_init().\n"); ioapic_base = pci_read_config32(dev, 0x74) & (0xffffffe0); /* some like mem resource, but does not have enable bit */ /* Don't rename APIC ID */ @@ -118,7 +118,7 @@ static void sm_init(device_t dev) } byte |= 1 << 2; pm_iowrite(0x74, byte); - printk_info("set power %s after power fail\n", on ? "on" : "off"); + printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off"); byte = pm_ioread(0x68); byte &= ~(1 << 1); @@ -152,10 +152,10 @@ static void sm_init(device_t dev) get_option(&nmi_option, "nmi"); if (nmi_option) { byte &= ~(1 << 7); /* set NMI */ - printk_info("++++++++++set NMI+++++\n"); + printk(BIOS_INFO, "++++++++++set NMI+++++\n"); } else { byte |= (1 << 7); /* Can not mask NMI from PCI-E and NMI_NOW */ - printk_info("++++++++++no set NMI+++++\n"); + printk(BIOS_INFO, "++++++++++no set NMI+++++\n"); } byte &= ~(1 << 7); if (byte != byte_old) { @@ -217,7 +217,7 @@ static void sm_init(device_t dev) byte &= ~(1 << 1); pm_iowrite(0x59, byte); - printk_info("sm_init() end\n"); + printk(BIOS_INFO, "sm_init() end\n"); /* Enable NbSb virtual channel */ axcfg_reg(0x114, 0x3f << 1, 0 << 1); diff --git a/src/southbridge/amd/sb700/sb700_smbus.c b/src/southbridge/amd/sb700/sb700_smbus.c index 91bbea852d..7ba2a7d264 100644 --- a/src/southbridge/amd/sb700/sb700_smbus.c +++ b/src/southbridge/amd/sb700/sb700_smbus.c @@ -196,7 +196,7 @@ static void alink_ab_indx(u32 reg_space, u32 reg_addr, tmp &= ~mask; tmp |= val; - /* printk_debug("about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */ + /* printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */ outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX); /* probably we dont have to do it again. */ outl(tmp, AB_DATA); reg_addr & 0x10000 ? outl(0, AB_INDX) : NULL; diff --git a/src/southbridge/amd/sb700/sb700_usb.c b/src/southbridge/amd/sb700/sb700_usb.c index 63679b8847..d2dcf852f2 100644 --- a/src/southbridge/amd/sb700/sb700_usb.c +++ b/src/southbridge/amd/sb700/sb700_usb.c @@ -82,7 +82,7 @@ static void usb_init2(struct device *dev) /* pci_write_config32(dev, 0xf8, dword); */ usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF; - printk_info("usb2_bar0=0x%x\n", usb2_bar0); + printk(BIOS_INFO, "usb2_bar0=0x%x\n", usb2_bar0); /* RPR6.4 Enables the USB PHY auto calibration resister to match 45ohm resistence */ dword = 0x00020F00; @@ -163,7 +163,7 @@ static void usb_init2(struct device *dev) dword |= 1 << 8; dword &= ~(1 << 27); /* 6.23 */ } - printk_debug("rpr 6.23, final dword=%x\n", dword); + printk(BIOS_DEBUG, "rpr 6.23, final dword=%x\n", dword); #endif } -- cgit v1.2.3