From af3dce981db63eb16d127347264a46247ed893bb Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sun, 30 Oct 2011 20:30:48 +0100 Subject: Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c. Change-Id: I3ccb3860207e1b3ccac4313f7b537c434af5166f Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/360 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek --- src/southbridge/amd/sr5650/pcie.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/amd/sr5650') diff --git a/src/southbridge/amd/sr5650/pcie.c b/src/southbridge/amd/sr5650/pcie.c index 37743cacae..eebe711cdb 100755 --- a/src/southbridge/amd/sr5650/pcie.c +++ b/src/southbridge/amd/sr5650/pcie.c @@ -370,8 +370,8 @@ static void gpp3a_cpl_buf_alloc(device_t nb_dev, device_t dev) slave_cpl = (u8 *)&pGpp111111; break; default: /* shouldn't be here. */ - printk(BIOS_DEBUG, "buggy gpp3a_configuration\n"); - break; + printk(BIOS_WARNING, "buggy gpp3a_configuration\n"); + return; } value = slave_cpl[dev_index - 4]; -- cgit v1.2.3