From 1c009276f17730c1c224d30522bd77b635edd6f1 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Wed, 20 Oct 2010 20:21:27 +0000 Subject: Revert sblk/sblink change, use sblk like the rest of the codebase does. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5978 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/rs780/rs780_gfx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/southbridge/amd') diff --git a/src/southbridge/amd/rs780/rs780_gfx.c b/src/southbridge/amd/rs780/rs780_gfx.c index 1667775658..a9801a17cd 100644 --- a/src/southbridge/amd/rs780/rs780_gfx.c +++ b/src/southbridge/amd/rs780/rs780_gfx.c @@ -304,7 +304,7 @@ static void internal_gfx_pci_dev_init(struct device *dev) volatile u32 * pointer; int i; u16 command; - u32 value, sblink; + u32 value, sblk; u16 deviceid, vendorid; device_t nb_dev = dev_find_slot(0, 0); device_t k8_f2 = dev_find_slot(0, PCI_DEVFN(0x18, 2)); @@ -455,13 +455,13 @@ static void internal_gfx_pci_dev_init(struct device *dev) /* Get SBLink value (HyperTransport I/O Hub Link ID). */ value = pci_read_config32(k8_f0, 0x64); - sblink = (value >> 8) & 0x3; - printk(BIOS_DEBUG, "SBLINK = %d.\n", sblink); + sblk = (value >> 8) & 0x3; + printk(BIOS_DEBUG, "SBLINK = %d.\n", sblk); /* HT speed */ value = pci_read_config32(nb_dev, 0xd0); printk(BIOS_DEBUG, "NB HT speed = %x.\n", value); - value = pci_read_config32(k8_f0, 0x88 + (sblink * 0x20)); + value = pci_read_config32(k8_f0, 0x88 + (sblk * 0x20)); printk(BIOS_DEBUG, "CPU HT speed = %x.\n", value); vgainfo.ulHTLinkFreq = 100 * 100; /* set HT speed. */ -- cgit v1.2.3