From b26156ec65f1622f97d4439b3977c7880f234054 Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Sat, 31 Jan 2015 17:45:50 +0100 Subject: bd82x6x/xhci: Set mask of ports switchable between USB2 and USB3. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ica1cc90715c1810668e3f4f7282e5757a5688483 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/8312 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/southbridge/intel/bd82x6x/chip.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/southbridge/intel/bd82x6x/chip.h') diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h index 290bb058ac..f4be82d81f 100644 --- a/src/southbridge/intel/bd82x6x/chip.h +++ b/src/southbridge/intel/bd82x6x/chip.h @@ -89,6 +89,11 @@ struct southbridge_intel_bd82x6x_config { int docking_supported; uint8_t pcie_hotplug_map[8]; + + /* Ports which can be routed to either EHCI or xHCI. */ + uint32_t xhci_switchable_ports; + /* Ports which support SuperSpeed (USB 3.0 additional lanes). */ + uint32_t superspeed_capable_ports; }; #endif /* SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H */ -- cgit v1.2.3