From 7f32df379cd42178a05239b6b1ced435d33d5ffa Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Tue, 2 Jun 2020 13:36:57 +0200
Subject: sb/intel/bd82x6x: Align some ME functions

This eliminates the differences in the first part of the file.

Change-Id: Ifb7d57da08e02664a28819e65bc8e9697ed38c4c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42009
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/intel/bd82x6x/me.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'src/southbridge/intel/bd82x6x/me.c')

diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index bc0a71e3a7..ebb9db93e5 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -10,10 +10,10 @@
 
 #include <acpi/acpi.h>
 #include <device/mmio.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
+#include <console/console.h>
 #include <device/pci_ids.h>
 #include <device/pci_def.h>
 #include <string.h>
@@ -564,7 +564,7 @@ static int intel_mei_setup(struct device *dev)
 		printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
 		return -1;
 	}
-	mei_base_address = (u32*)(uintptr_t)res->base;
+	mei_base_address = (u32 *)(uintptr_t)res->base;
 
 	/* Ensure Memory and Bus Master bits are set */
 	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-- 
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